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verilog code for counter four
verilog code for counter four
- 2022-01-26 05:32:56下载
- 积分：1
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newdecode
密码锁，大学数字eda课程顺序锁的源代码，有2位或者4位的顺序锁，可以在fpga或者cpld上实现
(Password lock, digital eda course the order of the source code of the locks, the order of two or four locks, and can be implemented on the fpga or cpld)
- 2012-03-09 00:04:57下载
- 积分：1
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5_lcd_ST7565P_12864
液晶ST7565P_12864驱动，实现打点成图。(LCD ST7565P_12864 drive, dot mapping.)
- 2012-04-04 20:01:42下载
- 积分：1
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rams
combinatorial modules
- 2019-04-13 19:41:21下载
- 积分：1
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SD_Controller_Verilog
说明： 该程序包是SD卡/MMC卡控制器SDC的verilog语言包，它包括以下4部分：RTL源代码，测试平台，软件仿真文件，说明文件。(This source package is the SD card and MMC card controler model based on the Verilog language. It has the following 4 parts: RTL language, testbench, software simulating files and help document.)
- 2021-04-05 17:39:03下载
- 积分：1
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Lesson1
FPGA课件，个人感觉不错，希望对大家有帮助(FPGA software, personal feel good, I hope all of you help)
- 2009-06-13 10:27:35下载
- 积分：1
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Altera-FPGA_CPLD-design-Advanced
《Altera FPGA_CPLD设计 高级篇》详细介绍FPGA应用于高级特性，LogicLock设计，时序约束，设计优化，高级工具及系统级设计技术，是深入学习FPGA的重要材料(" Altera FPGA_CPLD advanced part design" details FPGA used in advanced features, LogicLock design, timing constraints, design optimization, system-level design tools and advanced technology, in-depth study is an important material for FPGA)
- 2017-03-08 19:47:32下载
- 积分：1
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GPS
在fpga中对GPS信息采集程序。具有很好的参考性(In the fpga in the GPS information collection procedures. Has a very good reference)
- 2011-11-17 13:49:20下载
- 积分：1
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用Verilog做的SD卡控制器(有详细的注释)
SDIO 接口，实现SD卡的控制器功能，带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)
- 2020-06-16 22:00:01下载
- 积分：1
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Xilinx_AXI
说明： AXI verilog designs with testbench: AXI-lite, AXI, AXI-stream
- 2020-04-21 01:18:30下载
- 积分：1
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