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同步
基于FPGA的位同步算法的verilog实现(Verilog implementation of synchronization algorithm)
- 2018-04-17 10:50:12下载
- 积分：1
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EMIF
EMIF接口调试代码，使用的是Verilog语言，FPGA与DSP通信，测试成功(EMIF interface debugging code that USES the Verilog language, FPGA and DSP communication, testing success)
- 2020-12-04 10:39:24下载
- 积分：1
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AES加密算法verilog源码
AES加密算法verilog源码
This project is the hardware implementation of the
Advanced Encryption Standard with a key size of 128 bits.
The implementation adheres to the FIPS-197 document which explains the same.The core can do both encryption as well as decryption.The documents aes_arch.doc and aes_tb_readme.txt give further details of the rtl implementation and test bench respectively. This code was written originally with 128 bit ports for both input and key but later converted to 64 bits each to save on i/o pins. It can be reverted back easily if one just changes the port widths and dispenses with the load signal in the top module and making approriate changes in process where load is used.Synthesis results have been included for Xilinx Spartan-3 device.The directory structure of the project is as under-
AES128
- 2023-05-16 03:30:03下载
- 积分：1
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ICAP_FPGA_Multiboot
在xilinx的ml507板子上用的ICAP功能 配置存储器 这里边包含了控制程序 以及配置ICAP寄存器的程序 就是完整的通过串口控制FPGA多重配置的程序 用verilog实现的(how to configure the ICAP)
- 2021-03-05 15:49:31下载
- 积分：1
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sine-wave-in-UPS
正弦波UPS中的逆变电路 包括原理分析 框图 及原理图(Sine wave UPS inverter circuit the principle analysis block diagram and schematic)
- 2013-03-20 10:13:13下载
- 积分：1
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8BIT_CPU
一个8位的CPU设计，用verilog语言写的，希望有用(A CPU OF 8 BITS
)
- 2020-07-01 09:00:02下载
- 积分：1
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32位流水线浮点加法器
浮点系统是为在大动态范围内提供高分辨率而开发的。当动态范围有限的定点系统出现故障时，浮点系统通常可以提供解决方案。然而，浮点系统带来了速度和复杂性的惩罚。大多数微处理器浮点系统符合已出版的单精度或双精度IEEE浮点标准。
- 2022-02-07 22:08:07下载
- 积分：1
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e1framerdeframer
E1成帧器和解帧器的FPGA实现源码，测试可用(E1 Framer deframer)
- 2012-12-07 12:10:06下载
- 积分：1
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VCS_labs
说明： EDA软件VCS学习中用到的实际例子，都已经通过调试验证(Practical examples used in the learning of EDA software VCS have been verified by experiments.)
- 2019-04-29 11:45:52下载
- 积分：1
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eDP
eDP接口TFT-LCD显示驱动原码（verilog+c）(eDP Interface TFT-LCD display driver source code (verilog+c))
- 2020-10-17 09:17:27下载
- 积分：1
