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TFT_CTRL_800_480_16bit
说明: 文件用于驱动TFT屏,分辨率800*400,平台为quartus13,芯片为cycloneIV(The file is used to drive the TFT screen with a resolution of 800*400. The platform is quartus 13 and the chip is cyclone IV.)
- 2019-04-12 09:22:29下载
- 积分:1
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设计并制作一个14键单音电子琴预先存入一些曲谱电路在4Hz的时钟控制下自动播放
通过220V电源适配器给电路提供工作电源...
设计并制作一个14键单音电子琴预先存入一些曲谱电路在4Hz的时钟控制下自动播放
通过220V电源适配器给电路提供工作电源-Design and production of a 14-key electric piano tone into a number of music scores advance in 4Hz clock circuit under the control of automatic play through 220V power adapter to provide power to the circuit
- 2022-02-12 16:37:51下载
- 积分:1
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useful
FPGA做VGA视频显示的详细资料,我找了很久才收集起的,有四篇文章,很有用(FPGA do VGA video display detailed information, I found a long time before they start collecting, with four articles, very useful)
- 2020-12-21 18:29:09下载
- 积分:1
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The use of Altera' s FPGA
使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对4x4键盘的输入控制,并显示在一个8段式数码管上。-The use of Altera" s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 the development board to realize 4x4 keyboard input control, and displayed in an eight-stage digital pipe.
- 2022-09-23 11:15:03下载
- 积分:1
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water_light
Verilog语言的流水灯设计程序,对初学者很有用。(Water lights Verilog language design program useful for beginners.)
- 2015-03-15 13:48:43下载
- 积分:1
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- 2022-08-15 20:45:43下载
- 积分:1
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Design-of-taxi-meter-Based-on-FPGA
本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式;并对这两种实现方式的优点和缺点进行分析,比较后确定本系统的方案:基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)
- 2011-05-11 15:38:37下载
- 积分:1
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paidui
排队电路设计,适用于EDA大作业,大学生适合使用,初学者,仅仅是vhdl的语言,可以借鉴(Queuing circuit design, suitable for EDA operation, college students suitable for use, beginners, only the language of VHDL, can learn from)
- 2017-12-10 23:47:23下载
- 积分:1
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uart_fifo
一份带有FIFO缓存的UART源码,采用verilog编写,实现批量数据的传输,数据缓存量可以通过修改源码中的FIFO的深度来改变。(This is a UART with FIFO. The UART is programmed using verilog, it can transmit or receive batch data. The amount of data buffered can be changed by changing the depth of FIFO.)
- 2021-04-25 22:38:46下载
- 积分:1
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AD_R
AD7685芯片采集程序,可以自行设置采样率,经检验可用。(The AD7685 chip collection procedures, available.)
- 2020-12-20 14:19:08下载
- 积分:1