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FXY
FPGA做波形发生器,产生8种波形,包括三角波,正弦波,锯齿波,方波等。(FPGA is used as waveform generator,Generate 8 waveforms, including triangle, sine, sawtooth, square, etc.)
- 2019-07-16 16:01:45下载
- 积分:1
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VHDL of many examples, including the LED, lcd, keypad, digital control and so on...
vhdl的很多例子,包括LED、lcd、按键、数码管等等,非常的实用。-VHDL of many examples, including the LED, lcd, keypad, digital control and so on, very practical.
- 2023-05-20 00:25:04下载
- 积分:1
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vhdl编的dds函数发生器,完成sin(x)曲线的生成
vhdl编的dds函数发生器,完成sin(x)曲线的生成-vhdl function generator dds compiled to complete the sin (x) curve is generated
- 2022-07-02 02:04:16下载
- 积分:1
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SZ-VHDL
系统数字逻辑电路设计方法以及示例的介绍,分析较好,有价值(System digital logic circuit design methods and introduce examples, analyze good and valuable)
- 2014-03-30 08:34:05下载
- 积分:1
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Write their own extensions clock, an increase of the year, month day time, veril...
自己写的扩展功能时钟,增加了年、月日计时,verilog代码,已在spatarn3实现。-Write their own extensions clock, an increase of the year, month day time, verilog code in spatarn3 realize.
- 2023-01-04 22:35:04下载
- 积分:1
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整个工程代码
说明: 掌握SDRAM数据读写、刷新、初始化以及FPGA串口收发时序,熟练FIFO IP核的生成和调用。(Master SDRAM data read and write, refresh, initialization and the timing of sending and receiving of the serial port of the FPGA, skilled in the generation and invocation of the FIFO IP core.)
- 2019-01-21 17:21:27下载
- 积分:1
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A VHDL design with the use of powerful 32
一个使用VHDL设计的具有强大功能的32位CPU,这个文件包含了与之配套的PCI位码文件及配置程序。-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of the PCI code files and configuration procedures.
- 2022-08-10 06:36:50下载
- 积分:1
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AD9648_ver
FPGA通过SPI总线配置AD采集芯片AD9648的程序,Verilog实现 (FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization)
- 2013-09-27 17:28:14下载
- 积分:1
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sampleverilog
图像采集、存储控制verilog源代码(Image acquisition, storage, control of Verilog source code)
- 2021-04-15 22:28:54下载
- 积分:1
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shuzihongdianlu
数字钟电路的实现,可以24小时计时,可调整时间!(Digital clock circuit implementation, a 24-hour timer, adjustable time!)
- 2013-08-18 14:49:14下载
- 积分:1