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8051的Verilog
8051的Verilog-Verilog OF 8051
- 2022-06-15 04:13:18下载
- 积分:1
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数字频率计
说明: 设计一简易数字频率计,其基本要求是:
1)测量频率范围0~999999Hz;
2)最大读数999999HZ,闸门信号的采样时间为1s;.
3)被测信号可以是正弦波、三角波和方波;
4)显示方式为6位十进制数显示;
5)具有超过量程报警功能。
5)输入信号最大幅值可扩展。
6)测量误差小于+-0.1%。
7)完成全部设计后,可使用EWB进行仿真,检测试验设计电路的正确性。(The basic requirements of designing a simple digital frequency meter are:
1) The measuring frequency range is 0-999999 Hz.
2) The maximum reading is 999999HZ, and the sampling time of gate signal is 1 s.
3) The measured signal can be sine wave, triangle wave and square wave.
4) The display mode is 6-bit decimal number display.
5) It has alarm function beyond range.
5) The maximum amplitude of input signal can be expanded.
6) The measurement error is less than +0.1%.
7) After completing all the design, EWB can be used to simulate and test the correctness of the circuit.)
- 2019-06-20 12:47:51下载
- 积分:1
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bt1120
实现ITU-BT1120数字并行接口的编码和解码(decode and encode ITU-BT1120 parallel digital interface)
- 2021-01-12 12:08:48下载
- 积分:1
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7_ImageEnhance
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像增强处理,平滑,锐化,滤波(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image enhancement, smoothing, sharpening, filtering)
- 2020-10-20 21:07:24下载
- 积分:1
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total
一个简单的后台模板,主要为贵金属直播室有喊单等功能类型的。
ps:由于涉及到iframe本地跨域问题,因此查看时请在服务器上进行审阅。(A simple background template, mainly for the precious metal living room, such as the type of function.
PS: as a result of the local cross domain problem involved in the iframe, so check it out on the server.)
- 2015-11-18 09:00:49下载
- 积分:1
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TCAM
基于TCAM的高速路由查找,逻辑实现深度为32的内容查找,得到索引和命中指示(TCAM lookup based on a high-speed routing logic to realize the depth of content to find 32, get indexed and hit instructions)
- 2014-12-10 20:41:31下载
- 积分:1
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fen pin qi
半整数分频器的实现(verilog),本文以6.5分频为例!很实用的!-fen pin qi
- 2022-02-01 02:05:40下载
- 积分:1
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E1(一级欧洲传输标准)
E1 (FIRST ORDER EUROPE TRANSMISSION STANDARD)
- 2023-08-26 23:00:03下载
- 积分:1
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关于FFT算法的FPGA实现(源码),数字信号处理不可少。
关于FFT算法的FPGA实现(源码),数字信号处理不可少。-FFT algorithm on the FPGA implementation (source code)
- 2022-02-26 14:45:28下载
- 积分:1
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Some_classic_examples_of_VHDL_language_source_code
VHDL语言的一些经典实例源代码,包括状态机,时序电路,组合逻辑电路等(Some classic examples of VHDL language source code, including the state machine, sequential circuits, combinational logic circuits)
- 2010-07-11 12:50:06下载
- 积分:1