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uart_test
说明： 用于实现上位机与下位机之间通过RS232协议来进行通讯。(It is used to realize communication between upper computer and lower computer through RS232 protocol.)
- 2019-03-13 14:15:24下载
- 积分：1
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Flash
FPGA Verilog控制FLASH片外读写(Verilog Controls FLASH Out-of-Chip Read-Write)
- 2020-06-22 21:40:01下载
- 积分：1
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键盘输入串口输出显示字符,通过串口显示键盘输入的字符
键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters
- 2022-04-13 11:20:18下载
- 积分：1
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freq_meter
FPGA的测频程序，用了D触发器，能测1hz到几百hz(FPGA frequency measurement procedures, using a D flip-flop, can be measured to a few hundred hz 1hz)
- 2016-04-03 13:41:48下载
- 积分：1
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DE2_70_Control_Panel_v1.3.0
DE2-70开发板中附带的控制面板，可以读取存储器中的数据，这个可以正常连接和读取，有好几版本的，有的不能用，而这个经过我亲自测试。(DE2-70 development board comes with a control panel, you can read the data in the memory, this can be properly connected and read, there are several versions, and some can not be used, and this after I personally tested.)
- 2012-10-06 22:29:11下载
- 积分：1
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Optimised_OMP
一种压缩感知信号恢复算法，针对贪婪迭代类算法中的正交匹配追踪（OMP)算法的改进。OMP在每次迭代过程中选择出的原子并不是最优的，无法使本轮迭代中残差的减少最大化。本例程实现了改进的最优OMP算法，即Optimised_OMP，保证每次迭代选出的原子与已选出的原子序列所构成的平面正交，因而可以使残差下降的更快，从而加速算法收敛。(A compressed sensing signal recovery algorithms track (OMP) algorithm and orthogonal matching algorithm greedy iterative class. The OMP selected atoms in each iteration of the process is not optimal, not be able to maximize the reduction of the residual in the current round of iteration. The routines to achieve the optimal OMP algorithm improvements that Optimised_OMP, to ensure that each iteration selected atoms with atomic sequence elected a plane orthogonal, and thus can make the residuals have declined even faster, thus speeding up the algorithm convergence.)
- 2021-03-08 10:19:29下载
- 积分：1
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gmsk
利用fpga实现gmsk的调制并仿真，全部代码(Fpga implements gmsk)
- 2020-12-24 00:09:06下载
- 积分：1
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modsim仿真必备，可以帮助你解决很多你对软件不熟悉的问题！...
modsim仿真必备，可以帮助你解决很多你对软件不熟悉的问题！-Simulation modsim necessary, I can help you solve many of the software you are not familiar with the problem!
- 2022-04-23 10:16:49下载
- 积分：1
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8路视频光端机的VHDL源码，此硬件使用以太网的SERDES 借用TBI接口传输PCM视频信号。...
8路视频光端机的VHDL源码，此硬件使用以太网的SERDES 借用TBI接口传输PCM视频信号。-8-channel video PDH in VHDL source code
- 2022-07-04 15:14:38下载
- 积分：1
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I2S
SMT32F4 i2s 全双工配置，自己测试OK的，大家可以看看(SMT32F4 i2s 全双工配置)
- 2021-03-06 22:29:30下载
- 积分：1
