登录
首页 » VHDL » 任意基数分频VERILOG代码,经过了编译,可以修改数字改变分频。...

任意基数分频VERILOG代码,经过了编译,可以修改数字改变分频。...

于 2022-08-10 发布 文件大小:147.40 kB
0 121
下载积分: 2 下载次数: 1

代码说明:

任意基数分频VERILOG代码,经过了编译,可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • i2c_peri_demo_revC1
    说明:  I2C 从设备通讯应用示范程序,用于I2C设计验证(I2C slave communication application demo program, used to for I2C design verification )
    2010-03-18 01:24:52下载
    积分:1
  • i2c_master
    verilog i2c master rtl+testbench 转自特权同学(verilog i2c master rtl+testbench)
    2017-06-15 16:30:14下载
    积分:1
  • 基于查找表的无波发生器
    采用VHDL语言设计的基于LUT的正弦波发生器,已通过调试,并给出了pics仿真结果
    2022-05-27 16:00:57下载
    积分:1
  • H.264中二进制算术编码的硬件实现 H_264
    H.264中二进制算术编码的硬件实现Binary arithmetic coding in H.264 hardware implementation(Binary arithmetic coding in H.264 hardware implementation)
    2020-06-28 14:20:02下载
    积分:1
  • Based on the VHDL language for selecting the three sequences, you can have a cyc...
    基于VHDL语言的3级序列的产生,可以循环产生周期为7的m序列 -Based on the VHDL language for selecting the three sequences, you can have a cycle for cycle 7 m sequence
    2023-08-16 17:00:04下载
    积分:1
  • DEMO中完成WIAGAND26/32的(EMP7128实现)协议程序源代码
    DEMO中完成WIAGAND26/32的(EMP7128实现)协议程序源代码-DEMO completed WIAGAND26/32 (EMP achieved) agreement procedure source code
    2022-07-16 22:05:55下载
    积分:1
  • Static RAM is a tube composed of MOS flip
    静态RAM是由MOS管组成的触发器电路,每个触发器可以存放1位信息。只要不掉电,所储存的信息就不会丢失。因此,静态RAM工作稳定,不要外加刷新新电路,使用方便。但一般SRAM的每一个触发器是由6个晶体管组成,SRAM芯片的集成度不会太高,目前较常用的有6116(2K×8位),6264(8K×8位)和62256(32K×8位)。6264RAM有8192个存储单元,每个单元为8位字长。-Static RAM is a tube composed of MOS flip-flop circuit, each flip-flop can store one message. Long as it does not brown-out, the stored information will not be lost. Therefore, the static stability in the work RAM, do not refresh plus the new circuit and easy to use. But generally each SRAM trigger is composed of six transistors, SRAM chip integration will not be too high, there are currently more commonly used 6116 (2K × 8 bit), 6264 (8K × 8 bit) and 62256 (32K × 8 bits). 6264RAM have 8192 storage units, each for 8-bit word length.
    2022-04-10 07:00:36下载
    积分:1
  • ASIC______
    ASIC design and synthesis
    2010-03-14 14:23:05下载
    积分:1
  • verilog
    《数字信号处理的FPGA实现(第三版)》作者:U.Meyer-Baese 的配套源码,基于quartus9.0编写,使用的cyclone ii。其中包含FIR IIR FFT等算法的实现,对学习图像处理很有帮助。( FPGA digital signal processing (third edition) Author: U.Meyer-Baese The matching source, based on quartus9.0 preparation, the use of cyclone ii. Which includes FIR IIR FFT algorithm such as the realization of learning to image processing helpful.)
    2016-12-21 10:14:26下载
    积分:1
  • VHDL 的4*4键盘代码
    VHDL 的4*4键盘代码-VHDL 4* 4 keyboard code
    2023-04-05 11:35:04下载
    积分:1
  • 696518资源总数
  • 106215会员总数
  • 5今日下载