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cadence verilog lanaguage and simulation course
cadence verilog lanaguage and simulation course
- 2022-03-03 00:45:22下载
- 积分：1
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树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算...
树式除法型开方器VERILOG实现,用于任意长度的无符号数的开方运算-Square root of the tree-type divider-type device to achieve VERILOG
- 2022-09-04 14:20:03下载
- 积分：1
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I2C_code
与IP核配套的I2C-Master Core，包含了目前主流FPGA芯片的I2C实现，代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。(I2C-Master Core)
- 2010-05-22 22:12:26下载
- 积分：1
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vhdl语言主要描述语句的说明和使用方法，内附例子可供学习提高...
vhdl语言主要描述语句的说明和使用方法，内附例子可供学习提高-VHDL language description of the main description of statements and the use of methods, containing examples for learning improve
- 2022-01-31 14:01:30下载
- 积分：1
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qpsk_demod_use_FPGA
根据软件无线电的思想，提出了一种新颖的数字信号处理算法，对QPSK信号的相位进行数字化处理，从而实现对QPSK信号的解调.该算法允许收发两端载波存在频差，用数字锁相实现收发端载波的同步，在频偏较大的情况下，估算频偏的大小，自适应设置环路的带宽，实现较短的捕获时间和较好的信噪性能。整个设计基于XILINX公司的ISE开发平台，并用Virtex-II系列FPGA实现。用FPGA实现调制解调器具有体积小、功耗低、集成度高、可软件升级、扰干扰能力强的特点，符合未来通信技术发展的方向。(According to the idea of software radio, a novel digital signal processing algorithm, the phase of QPSK digital signal processing, enabling the demodulation of QPSK signals. This algorithm allows the sending and receiving ends of the carrier frequency difference exists, using digital phase-locked to achieve synchronization of sending and receiving end of the carrier, in the case of large frequency offset, frequency offset estimation of the size, adaptive set the loop bandwidth to achieve shorter acquisition time and better noise performance. The whole design is based on the company XILINX ISE development platform, and Virtex-II series with the FPGA. FPGA realization of a modem with a small size, low power consumption, high integration, software upgrades available, the characteristics of strong interference interference, in line with the future direction of ICT development.)
- 2010-12-06 10:52:36下载
- 积分：1
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SOUND_PLAY6
WM8731芯片的音效处理verilog代码，
WM8731芯片是音频ADCDAC芯片(WM8731 audio processing chip verilog code, WM8731 chip audio ADC DAC chip)
- 2013-12-14 14:12:10下载
- 积分：1
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verilog hdl verilog hdl verilog hdl
verilog hdl verilog hdl verilog hdl-verilog hdl
- 2022-07-23 23:39:39下载
- 积分：1
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004
51单片机的下载器PCB图，可以用于at89cXX和at89c0xx系列的单片机的程序烧录，简单好用！使用proteus画的板。(51 MCU PCB map downloader, can be used at89cXX and procedures for microcontroller series at89c0xx burning, easy to use! Drawing board with proteus.)
- 2011-10-26 11:03:40下载
- 积分：1
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it is a multiplier used in RIsc architecture based processor.......
it is a multiplier used in RIsc architecture based processor.......
- 2022-08-09 07:53:07下载
- 积分：1
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sobel
这是本人自己编写的可用于256*256大小的图像进行sobel边缘检测的vhd文件，可在QuartusII或MaxplisII下综合和仿真，并在FPGA上测试过。可以进行修改支持其他大小图像的sobel边缘检测，同时还可以实现其它的图像模块化处理算法，例如高斯滤波，平滑等。(this is my own preparation for the 256* 256 size of the image segmentation Edge Detection vhd document in the next QuartusII or MaxplisII integrated and simulation, and the FPGA tested. Can be adapted to support other size image segmentation edge detection, It can also achieve other modular image processing algorithms, such as Gaussian filtering, smoothing and so on.)
- 2020-07-09 21:08:55下载
- 积分：1
