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at7_ex04
通过LED闪烁控制器的代码,使用Vivado工具配置定义一个IP核,在用户工程中可随意添加这个IP核作为设计的一部分,如同Vivado自带的IP核一样方便调用和集成。(Through the code of the LED scintillation controller, the Vivado tool is configured to define a IP core, and the IP kernel can be added as part of the design at random in user engineering. It is as convenient to call and integrate as the IP kernel with Vivado.)
- 2018-04-09 18:41:52下载
- 积分:1
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fpga1
说明: 基于EasyFPGA030的直流电机控制电路设计和四位数字密码锁。(DC Motor Control Based on EasyFPGA030 circuit design and four-digit combination lock.)
- 2010-05-03 20:20:42下载
- 积分:1
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used in the preparation of Verilog FLEX10K achieve simple CPU
用verilog编写在FLEX10K上实现的简易CPU-used in the preparation of Verilog FLEX10K achieve simple CPU
- 2022-03-25 10:21:37下载
- 积分:1
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利用两个半加器来组成的全加器,是简单的vhdl语言入门
利用两个半加器来组成的全加器,是简单的vhdl语言入门-The use of two and a half adder to form the full adder is a simple entry-vhdl language
- 2023-08-01 03:35:04下载
- 积分:1
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DCT_2D
二维DCT,FPGA实现JPEG压缩中的二维DCT(dct)
- 2020-12-02 18:39:25下载
- 积分:1
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汽车自动化
使用VHDL汽车自动化技术VHDL代码1.镜旋转2.温度控制近期许多应用程序并通过VHDL它将会更容易
- 2022-07-06 12:18:03下载
- 积分:1
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用VerilogHDL进行频率生成器。
yong VerilogHDL yu yan bianxie de pinlv fa sheng qi,shi yong ISE ruan jian da kai.-Used VerilogHDL to make a frequency builder.
- 2022-01-21 03:50:48下载
- 积分:1
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lpddr2
LPDDR2 SDRAM memories compliant to JEDEC JESD209-2.
- 2015-05-11 20:57:21下载
- 积分:1
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SSI-ABZ
SSI转ABZ信号FPGA程序,测试完全可用(Function of SSI convert to ABZ signal,is available)
- 2019-05-19 15:37:48下载
- 积分:1
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verilog,4、5分频器,5分频器占空比3:2
verilog,4、5分频器,5分频器占空比3:2-Verilog, 4,5 dividers, five dividers ratio of 3:2
- 2022-06-12 21:27:51下载
- 积分:1