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zobrazenie_16_bit_cisla_paralel
16 bit switch input view in hexa format on 7seg display
- 2013-08-16 00:50:49下载
- 积分:1
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ad5791
在Quartus环境下编写,使用Cyclong系列芯片,配置七通道高精度AD5791,该例子为AD5791的FPGA配置使能代码,包括模拟数据输入模块,复位模块,命令接收是能配置模块。(AD5781,Digital signal convert to Analog signal)
- 2021-04-20 14:28:50下载
- 积分:1
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ADC实验
用于单片机的adc采集实验,经过降噪处理,结果精确(ADC acquisition experiment for single chip computer, after noise reduction processing, the result is accurate)
- 2018-11-27 21:41:13下载
- 积分:1
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mdio
用VIVADO软件编写的,实现以太网芯片88E1510中的mdio控制模块代码,并且含有VIO仿真文件(Written in VIVADO software, the realization of the Ethernet chip 88 e1510 mdio control module of code, and contains the VIO simulation file)
- 2020-09-16 14:37:55下载
- 积分:1
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UART
Task4 for learning verilog
- 2019-05-28 12:31:15下载
- 积分:1
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系统设计
说明: 基于数码管独立显示和三色灯的交通指示系统设计(Design of Traffic Indicator System Based on Digital Tube Independent Display and Tri-color Lamp)
- 2020-06-21 02:00:01下载
- 积分:1
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cordic
说明: 实现可连续输入数据做三角函数变换处理,通过verilog代码实现,(It realizes triangular function transformation for continuous input data.)
- 2020-06-21 22:40:01下载
- 积分:1
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ASYNC_FIFO_SYNTH
This file contains async fifo design
- 2014-03-01 20:48:22下载
- 积分:1
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PS2_kebord_controller
PS2键盘控制器的VHDL源码,用FPGA直接读取键盘的输入并显示。(PS2 keyboard controller VHDL source code, with a direct FPGA to read keyboard input and displayed.)
- 2010-10-15 18:13:27下载
- 积分:1
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PCI_PIO
不足20元的PCI设计,含ABEL源代码。(PCI design less than 20Yuan ,including ABEL code)
- 2005-08-28 02:44:26下载
- 积分:1