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Combined unit GPS clock synchronization detection unit merger GPS synchronized c...
合并单元内GPS同步时钟的检测
合并单元内GPS同步时钟的检测-Combined unit GPS clock synchronization detection unit merger GPS synchronized clock detection
- 2023-05-04 14:30:04下载
- 积分：1
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FPGA简:讲述了FPGA的基本概念、结构、发展
FPGA简:讲述了FPGA的基本概念、结构、发展-Jane FPGA: FPGA describes the basic concepts, structure, development
- 2022-03-10 18:57:06下载
- 积分：1
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SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps...
SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps
- 2023-01-21 19:35:04下载
- 积分：1
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Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB
Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB-Xilinx, Altera, ARM, AVR, S52, Lattice series FPGA download cable circuit diagram and PCB
- 2022-03-17 00:48:42下载
- 积分：1
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altera嵌入式设计大赛文章，车载cots设计实现
altera嵌入式设计大赛文章，车载cots设计实现-Embedded Design Contest altera article, cots Car Design
- 2022-05-20 14:21:28下载
- 积分：1
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pll
说明： fpga配置锁相环完整程序，使用quartus IP核，Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:01下载
- 积分：1
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cntl_ddr3(xilinx)
xilinx ddr3最新VHDL代码,通过调试(xilinx ddr3 latest VHDL code through debugging)
- 2007-12-05 23:03:10下载
- 积分：1
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Testsystem for i2c controller
-- State machine for reading data from Dallas 1621
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-- Testsystem for i2c controller--- State machine for reading data from Dall as 1621---- Testsystem for i2c controller
- 2022-06-17 11:26:02下载
- 积分：1
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这是一个很好的USB程序。
这是一个很好的USB程序。-This is a very good USB procedures.
- 2022-01-26 00:08:09下载
- 积分：1
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rs-codec(255-223)
RS编码是一种纠错码，本程序实现RS（255，223）用FPGA 实现RS编码，程序在Quartus II中调试通过。(RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.)
- 2021-05-13 00:30:02下载
- 积分：1
