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BRAT
early branch rename table(store rename table once the branch instruction comes in. Used in out of order pipeline processor)
- 2012-03-27 15:15:08下载
- 积分：1
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cpldfpga
《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)
- 2009-04-20 20:59:16下载
- 积分：1
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修改后的展位乘法的两个华莱士算法签名和签名二进制数
这个项目修改后的展位华莱士算法给出了所需的方法来实现一种高速度和高性能并行计算的复数模拟乘法器。设计的结构使用基数 4 修改 Booth 算法和华莱士树。这两种技术来加速增殖过程，作为他们的能力，以减少局部产品代到 11/2 和压缩部分产品期限按比例为 3 ∶ 2。尽管如此，携带保存加法器 （CSA） 是用来增强系统的加法过程的速度。设计了系统有效地使用 VHDL 代码为 8 x 8 位签署数字和成功的模拟.
Booth 型乘法器可以减少迭代步长，以执行乘法比较常规步骤操作次数。Booth 算法 "扫描" 乘法器操作数，并跳转到链的这种算法可以减少产生相对于常规的乘法算法，每个位的乘数乘以与被乘数和部分产品对齐和加在一起的结果所需的加法次数。更有趣的是加法次数是数据依赖
- 2023-07-28 05:20:04下载
- 积分：1
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AXI4_Sim
说明： 实现AXI,AXI-Lite乒乓地址的传输，AXI,AXI-Lite已经封装成内核，可直接修改后使用(Realize the transmission of table tennis address of Axi and Axi Lite. Axi and Axi Lite have been encapsulated into a kernel, which can be directly modified and used)
- 2020-05-31 15:20:16下载
- 积分：1
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HDB3 ENCODING AND DECODING METHOD
HDB3 ENCODING AND DECODING METHOD
- 2022-12-23 08:30:03下载
- 积分：1
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ps2_interface
封装PS2接口驱动，用verilog编写！适用于键盘，鼠标等PS2接口的器件。(failed to translate)
- 2013-05-05 10:48:42下载
- 积分：1
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xapp from xilinx very hard to find and very usefull application note from the gr...
xapp from xilinx very hard to find and very usefull application note from the great firm from USA
- 2022-01-25 23:53:59下载
- 积分：1
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HART-HT2015
HART 官方资料-HART协议采用基于Bell202标准的FSK频移键控信号，在低频的4-20mA模拟信号上叠加幅度为0.5mA的音频数字信号进行双向数字通讯，数据传输率为1.2kbps。(Official information-HART HART protocol based Bell202 standard frequency shift keying FSK signal at low frequencies 4-20mA analog signal amplitude is 0.5mA superimposed on the two-way audio digital signal digital communication, data transfer rate of 1.2kbps.)
- 2013-07-16 17:23:16下载
- 积分：1
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can_controller
基于FPGA的VHDL，can总线控制的设计与实现，在ISE下弄的。(FPGA-based VHDL, can control the design and implementation of the bus, get under the ISE' s.)
- 2011-05-05 23:32:25下载
- 积分：1
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Lpfilter_20190503
说明： 环路滤波器是通信信号调制解调中最重要的一个部分，环路滤波器设计的好坏将直接影响到接收机的性能指标，二阶锁频辅助三阶锁相环路滤波器可以稳定跟踪具有加加速度的信号源，是现代通信中非常实用的技术，本文中详细编写了单载波信号产生模块、信道噪声模块、数字正交下变频模块、鉴频鉴相模块、环路滤波器模块，并包含了完整的testbench模块，对于初学者非常有用。(Loop filter is the most important part of communication signal modulation and demodulation. The design of loop filter will directly affect the performance index of receiver. The second-order frequency locking assisted third-order phase-locked loop filter can stably track the signal source with acceleration speed, which is a very practical technology in modern communication. In this paper, the single carrier signal generation module and channel noise are written in detail Sound module, digital orthogonal down conversion module, frequency and phase detection module, loop filter module, and contains a complete testbench module, which is very useful for beginners.)
- 2020-11-11 01:27:25下载
- 积分：1
