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Generate_4fsk
雷达信号产生4PSK简单脉冲信号很好用信号产生(Radar signal pulse signal generating 4PSK simple signal generating good)
- 2013-06-22 23:10:05下载
- 积分：1
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VGA count, PSW2 inverse control is counting? Reduced count, pop
VGA计数，PSW2控制正逆计数，按下递减计数，弹起正向计数。利用VGA作为输出设备，显示计数值。-VGA count, PSW2 inverse control is counting? Reduced count, pop-up being counted. The use of VGA as the output equipment, revealed count.
- 2022-04-17 09:49:34下载
- 积分：1
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IIR-FPGA
基于FPGA实现IIR滤波器的程序，用VERILOG编程语言实现(The program based on the FPGA implementation of the IIR filter is implemented in the VERILOG programming language)
- 2017-05-24 11:08:15下载
- 积分：1
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SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。...
SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
- 2023-07-19 13:10:03下载
- 积分：1
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divider_latest.tar
floating point divider
- 2009-11-03 11:23:16下载
- 积分：1
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利用AT89C51实现LCD日历电子钟源码
利用AT89C51实现LCD日历电子钟源码-AT89C51 realization of the use of electronic LCD calendar clock source
- 2023-01-24 10:00:03下载
- 积分：1
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帧同步信号FPGA实现代码（可正常运行）
通信系统帧同步信号的设计与实现，巴克码识别器系统完整VHDL程序，本人课程设计，完全能正常运行，程序运行环境为Quartus II 7.2 (32-Bit)，win7系统。编译码模块、分频模块、门限设置模块、仿真电路和程序都有。相互交流，共同学习！！
- 2022-03-24 07:45:00下载
- 积分：1
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ch3ex
部分组合逻辑数字电路的VHDL代码，包含必要的功能描述(Some combinational logic digital circuits VHDL code, containing the necessary functional description)
- 2009-01-31 21:26:34下载
- 积分：1
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CORDIC算法的硬件实现 用的verilog语言
CORDIC算法的硬件实现 用的verilog语言-CORDIC algorithm Hardware Implementation of the Verilog language
- 2022-02-01 05:03:35下载
- 积分：1
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RS_Encoder
具有16个校验位的RS编码器，在FPGA上实现。(With 16 RS encoder, the parity bit in the FPGA.)
- 2012-08-06 11:52:37下载
- 积分：1
