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verilog cpu代码

于 2022-05-07 发布 文件大小:1.50 kB
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2、处理器的指令系统采用了MIPS  CPU的常用指令,处理器结构参考MIPS的体系结构进行设计。总线宽度为32位。 3、完成的MIPS指令集: R型:SLLV,SRAV,ADDU,SUBU,AND,OR,XOR,NOR,SLT,JR J型:J I型:BLTZ,BGTZ,BEQ,LW,SW,ADDIU,SLTI,ANDI,ORI,XORI。

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