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FPGA
Verilog学习例程EP2C5,内有跑马灯等18个程序(Verilog learning routines EP2C5, marquees and other 18 programs)
- 2020-12-06 22:29:21下载
- 积分:1
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PCPU设计代码
说明: RISC 5级流水线CPU,带HAZARD处理(RISC 5 pipeline CPU with HAZARD processing)
- 2020-06-24 04:00:01下载
- 积分:1
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基于XILINX FPGA的OFDM通信系统基带设计
基于XILINX FPGA的OFDM通信系统基带设计 浙江大学出版社出版 ofdm verilog HDL语言(Baseband Design of OFDM communication system based on XILINX FPGA, published by Zhejiang University press)
- 2017-09-04 21:23:49下载
- 积分:1
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McBSP_8bit_Asyn
基于FPGA的Mcbsp通信源码,经过项目实测检验(Mcbsp communication source code based on FPGA,Through the test of the project.)
- 2018-03-19 17:19:17下载
- 积分:1
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DE2_70_LTM_CCD
A design on a DE270 FPGA with the use of CCD: a camera DC2 and a TRDB LTM after reading from the SRAM.
- 2009-10-04 23:27:04下载
- 积分:1
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attachments_2010_01_29
dct and idct vhdl code
- 2010-03-24 23:08:41下载
- 积分:1
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UART_RX_
fpga串口的发送程序基于verilog语言拿走不用谢。(The sending program of FPGA serial port is based on Verilog language.)
- 2020-06-18 04:00:01下载
- 积分:1
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17_walsh_128
walsh码,在CDMA系统中经常使用到的方法,在quartusII环境下实现的。(walsh code in the CDMA system, the method often used in quartusII environment to achieve.)
- 2020-07-03 09:00:02下载
- 积分:1
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变采样滤波器的FPGA实现(25M<-->30.72M变采样)
已经应用到USRP N210中,实现的部分是25M-->30.72M的变采样,以适应LTE协议对物理层的要求,代码已经仿真验证,并且在USRP的板子中实现(XIlinx)
- 2022-08-20 05:07:27下载
- 积分:1
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自编同步串口收发,单端信号可实现板内,配合422或LVDS板间传输效果不错
自编同步串口收发,单端信号可实现板内,配合422或LVDS板间传输效果不错内附pingpang缓存接受的例程,帮助快速构建代码,FIFO请根据器件生成或自编
- 2022-11-19 12:40:04下载
- 积分:1