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本文件解压后clock_time.vhd采用编程环境maxplusII，完成时间秒定时、记时，设置时间秒、声光报警等功能。...
本文件解压后clock_time.vhd采用编程环境maxplusII，完成时间秒定时、记时，设置时间秒、声光报警等功能。-this document unpacked clock_time.vhd maxplusII use programming environment, the time for completion seconds timing, Hutchison, the set-up time seconds, sound, light, alarm functions.
- 2022-07-03 03:02:23下载
- 积分：1
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ug_dsp_builder
本文是Altera公司编写的dspbuilder的设计方法，但是是英文原版的(This article is prepared by Altera Corporation dspbuilder design method, but it is the original English edition of)
- 2008-12-14 01:33:58下载
- 积分：1
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基于DDS的DA正弦波输出
Sample behavioral waveforms for design file sin_rom.vThe following waveforms show the behavior of altsyncram megafunction for the chosen set of parameters in design sin_rom.v. For the purpose of this simulation, the contents of the memory at the start of the sample waveforms is assumed to be ( 3F0, 3F1, 3F2, 3F3, ...). The design sin_rom.v has one read port. The read port has 1024 words of 10 bits each. The output of the read port is unregistered. Fig. 1 : Wave showing read operation. The above waveform shows the behavior of the design under normal read conditions. The read happens at the rising edge of the enabled clock cycle. The output from the RAM is undefined until
- 2022-01-26 04:06:16下载
- 积分：1
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this project is based on half adder ,full adder,half subtractor and full subtrac...
this project is based on half adder ,full adder,half subtractor and full subtractor using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
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this project is based on half adder ,full adder,half subtractor and full subtractor using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
- 2022-12-30 21:40:03下载
- 积分：1
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CORDIC算法的FFT实现
本代码实现了 ； ；CORDIC ； 算法语言；
- 2022-09-09 16:25:03下载
- 积分：1
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verilog 入门概述 新手学习资料
verilog 入门概述 新手学习资料-Getting Started with an overview of novice learning materials verilog
- 2022-03-09 23:40:45下载
- 积分：1
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出租车的计费系统，通过这个文件可以清楚地了解出租车的计费原理。...
出租车的计费系统，通过这个文件可以清楚地了解出租车的计费原理。-Taxi billing system, the adoption of the document can be a clear understanding of the accounting principle of a taxi.
- 2022-02-04 05:01:32下载
- 积分：1
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自已写的一个16X16的乘法器，速度比较慢。初学者练习练习！
自已写的一个16X16的乘法器，速度比较慢。初学者练习练习！-own writing an audio Multiplier, speed is relatively slow. Beginners practice practice!
- 2022-07-02 12:25:49下载
- 积分：1
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06_lcd7_touch
基于7Z010的触摸屏驱动程序.开发板使用的是Xilinx公司的Zynq7000 系列的芯片， 型号为XC7Z010-1CLG400C，
400 个引脚的 FBGA 封装。 ZYNQ7000 芯片可分成处理器系统部分 Processor System（PS）
和可编程逻辑部分 Programmable Logic（PL）。 在 AX7010 开发板上，ZYNQ7000 的 PS
部分和 PL 部分都搭载了丰富的外部接口和设备，方便用户的使用和功能验证。(Touch screen driver based on 7z010)
- 2017-04-20 19:13:06下载
- 积分：1
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PID_Verilog
说明： PID算法用verilog语言实现，实测可用，由三个模块组成(The PID algorithm is implemented in Verilog language. The actual measurement is available. It consists of three modules.)
- 2019-04-30 02:32:21下载
- 积分：1
