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verilog 代码
基于FPGA的VERILOG语言的DS18B20温度检测程序，代码自测可用(FPGA based VERILOG language DS18B20 temperature detection program, code self test available)
- 2018-07-05 15:36:01下载
- 积分：1
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uart_byte_rx
libero soc工程，实现通过串口接收到单字节数据后并返回发送给上位机(Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer)
- 2020-06-21 09:20:01下载
- 积分：1
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Verilog_SimpleCalculator-master
这是一个计算器的Verilog代码，可实现加减乘除等基础功能(calcultor for you to do some reserches.)
- 2017-12-24 10:24:59下载
- 积分：1
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AD_DA
黑金的adda模块资料，质量不错，做电路板的可以作为参考(Black gold ADDA module data)
- 2020-12-07 21:39:21下载
- 积分：1
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FIR
说明： 一个1MHz的FIR低通滤波器。
① 时钟信号频率16MHz;
② 输入信号位宽8bits，符号速率16MHz；
③ 要求在Matlab软件中进行FIR滤波器浮点和定点仿真，并确定FIR滤波器抽头系数；
④ 写出测试仿真程序。(A 1MHz FIR low pass filter.
(1) The clock signal frequency is 16MHz;
(2) The input signal has a bit width of 8 bits and a symbol rate of 16 MHz;
(3) Floating-point and fixed-point simulation of FIR filter is required in Matlab software, and tap coefficients of FIR filter are determined.
(4) Write the test simulation program.)
- 2019-06-19 21:47:13下载
- 积分：1
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fpga--lpass
基于FPGA的数字低通滤波器 。。。。。(FPGA-based digital low-pass filter。。。。。)
- 2021-04-24 08:28:47下载
- 积分：1
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FPGA I2C IP
应用背景i2cSlave is a minimalist I2C slave IP core that provides the basic framework for the
implementation of custom I2C slave devices. The core provides a means to read and write
up to 256 8-byte registers. These registers can be connected to the users custom logic,
thus implementing a simple control and status interface.关键技术The core has up 256 registers that can be accessed via I2C. I2C write operations are used
to set the register address pointer, and write the register data. I2C reads are used to read
the register data. Successive data reads or writes result in data being read or written from
incremental register addresses. There is no limit on how much data can be read or written
in a single access, but the internal register address pointer will wrap round to 0 once it
reaches 255. Note that the address pointer is not initialized at reset, and the address
pointer must
- 2022-05-22 00:28:39下载
- 积分：1
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pci_fpga
对pci9054芯片的配置进行了设置，并对PCI9054的各状态机进行了设置，程序经过了测试(Pci9054 chip on the configuration of the set, and each state machine PCI9054 been set, the program have been tested)
- 2013-10-12 11:39:45下载
- 积分：1
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卡内基梅陇大学verilog课程讲义-unlocked
说明： verilog讲义
卡内基梅陇大学verilog课程讲义-unlocked
卡内基梅陇大学verilog课程讲义-unlocked(Verilog Course Lectures at Carnegie Mellon, University Verilog Course Lectures at Carnegie Mellon University Verilog Course Lectures at Carnegie Mellon University)
- 2020-06-20 18:00:02下载
- 积分：1
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FMCOS
复旦cpu COS
- 2015-12-23 15:53:42下载
- 积分：1
