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Based on the Signal Integrality theory, the key problem met during signal proces...

于 2022-03-18 发布文件大小:82.07 kB

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高速电路的信号完整性问题，共同学习，有借鉴意义-Based on the Signal Integrality theory, the key problem met during signal processing module design and its solution is given

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一个任务显示LED，一个扫描键盘，一个任务将键值转化为显示格式（无时间要求）键盘模块完全参照巨人老师例程；显示很简单：1、判是否到2ms 2、送显示...
一个任务显示LED，一个扫描键盘，一个任务将键值转化为显示格式（无时间要求）键盘模块完全参照巨人老师例程；显示很简单：1、判是否到2ms 2、送显示键值处理：1、有无有效信息 2、弹出有效信息处理队列 3、将信息处理；键值处理不随1ms动作-a task LED, a scanning keyboard, a pair of tasks into a display format (no time requirements) keyboard module is taking giant teachers routines; Show is very simple : one, whether sentenced to two 2ms sent show keys : 1, the effective availability of information 2 , pop effective information processing cohort 3, information processing; the pair handle moves with 1ms

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c51拼音输入法~~带了很多注解~很实用
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复旦FM1702源码,完整资料,已经编译通过.复旦FM1702的资料几乎就是RC500英文的翻译版...
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2022-03-07 15:56:51下载

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充分实现
uart全功能实现.实现如下函数: U_Open, U_Close, U_GetBytes, U_PutBytes, U_GetBytesAvail, U_GetTxRoomLeft, U_PutISRBytes, U_GetTxISRRoomLeft, U_Purge, U_SetOwner, U_SetFlowCtrl, U_ConfigEscape, U_SetDCBConfig, U_CtrlDCD, U_CtrlBreak, U_ClrRxBuffer, U_ClrTxBuffer, U_SetBaudRate, U_SendISRData, U_SendData, U_GetOwnerID, U_SetAutoBaud_Div, /*TY adds these to expand flexibility 2004/10/15*/ U_Register_TX_cb, U_Register_RX_cb, /*TY adds these to let virtual COM port can retrive exception log 2005/3/8*/ U_GetUARTByte, U_PutUARTByte, U_PutUARTBytes, /*for virtual com port to return DCB configuration*/ U_ReadDCBConfig, U_CtrlRI, U_CtrlDTR, U_ReadHWStatus -the realization of full-featured UART. to achieve the following functions: U_Open, U_Close, U_GetBytes, U_PutBytes, U_GetBytesAvail, U_GetTxRoomLeft, U_PutISRBytes, U_GetTxISRRoomLeft, U_Purge, U_SetOwner, U_SetFlowCtrl, U_ConfigEscape, U_SetDCBConfig, U

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Based on the Signal Integrality theory, the key problem met during signal proces...

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