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LEDWATER
说明: LIUSHUIDENG VHDLYUYAN XIADE SHUIDENG(LEDWATER I WRITER IT MYSILF.IT'S EASY ! YOU CAN WRITER IT,TOO)
- 2017-08-31 11:17:13下载
- 积分:1
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5_ADC_Lab
altear max10 adc demo,实验使用了2个adc,最大支持18路adc(altear max 10 demo with 2 adc, max support 18 channel adc)
- 2021-04-21 14:48:49下载
- 积分:1
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这是可编程逻辑器件(CPLD)初学者的入门级文章,仅供参考。...
这是可编程逻辑器件(CPLD)初学者的入门级文章,仅供参考。-This is the programmable logic device (CPLD), the entry-level beginners articles for reference purposes only.
- 2022-01-22 10:28:59下载
- 积分:1
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用Verilog做的SD卡控制器(有详细的注释)
SDIO 接口,实现SD卡的控制器功能,带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)
- 2020-06-16 22:00:01下载
- 积分:1
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这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章,实用性很强的,在这里也感谢这篇文章的作着...
这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章,实用性很强的,在这里也感谢这篇文章的作着-This is a description language with verilog viterbi decoding and rake receiver of the article, very practical, here are grateful for this article was
- 2022-05-13 15:53:30下载
- 积分:1
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8路视频光端机的VHDL源码,此硬件使用以太网的SERDES 借用TBI接口传输PCM视频信号。...
8路视频光端机的VHDL源码,此硬件使用以太网的SERDES 借用TBI接口传输PCM视频信号。-8-channel video PDH in VHDL source code
- 2022-07-04 15:14:38下载
- 积分:1
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vhdl,双向移位寄存器,实现置数,左移及右移操作
vhdl,双向移位寄存器,实现置数,左移及右移操作-vhdl, bi-directional shift register to achieve set the number of left and right shift operation
- 2022-07-14 16:53:32下载
- 积分:1
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TDMsystem
实现多路可变时分复用,包括复接器,解复接,比特同步,帧同步,分频器(Implement multi-channel variable time division multiplexing, including multiplexer, demultiplexing, bit synchronization, frame synchronization, frequency divider)
- 2018-09-16 23:29:09下载
- 积分:1
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walsh
沃尔什函数发生器工程文件,Quartus Ⅱ 13.0版本(Walsh Function Generator)
- 2020-07-03 08:20:01下载
- 积分:1
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Walsh
说明: 利用ISE编写的产生WALSH码的verilog程序,简单易懂,稍稍修改就可以产生出自己想的8 16 32 64位的WALSH码。。(Prepared using ISE verilog code generated WALSH procedures, easy to understand, a little modification can generate their own like the 8,16,32,64-bit code WALSH. .)
- 2010-04-20 09:55:10下载
- 积分:1