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pingpong
用Verilog代码实现的乒乓操作，用Verilog代码实现的乒乓操作(Verilog pingpong)
- 2016-01-15 17:35:06下载
- 积分：1
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xiawenyu-verilog-
数字系统设计的入门书，教你如何学会用verilog语言实现各种数字逻辑功能，例程经典易懂(xiawenyu verilog)
- 2012-02-18 11:40:39下载
- 积分：1
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8251的完整的功能的实现,可以进行编译,综合.
8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.
- 2022-02-25 05:27:00下载
- 积分：1
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FPGAshixu
FPGA经验总结：时序是设计出来的
我们在做详细设计的时候，对于一些信号的时序肯定会做一些调整的，但是这种时序的调整最多只能波及到本一级模块，而不能影响到整个设计。(FPGA Experience: Timing is designed to do the detailed design of our time, for some signal timing will certainly make some adjustments, but adjust this timing can only spread to up to this level of the module, but not affect the whole design.)
- 2015-03-13 10:27:51下载
- 积分：1
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宝宝挂
最新热血江湖外挂，需要的可以下载，游戏开心热血江湖应用辅助(Yulgang latest plug-in needed to download, games happy))
- 2020-06-23 09:20:02下载
- 积分：1
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一些vhdl的简单例子。直接解压，不用密码。
一些vhdl的简单例子。直接解压，不用密码。-instantiate some simple examples. Direct unpack, without a password.
- 2023-04-21 21:55:02下载
- 积分：1
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FSK信号发生器，基于VHDL语言，好用的！
FSK信号发生器，基于VHDL语言，好用的！-FSK signal generator, based on the VHDL language, useful!
- 2022-06-19 14:00:10下载
- 积分：1
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ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。...
ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。-ALTERA on the operation of the SDRAM controller Verilog procedures, it is definitely worth a good draw.
- 2022-01-26 03:51:39下载
- 积分：1
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FFT_FPGA_Verilog-master
xilinx ise开发环境中fft IP核调用，仿真(Xilinx ise development environment FFT IP core call, simulation)
- 2018-07-08 23:28:46下载
- 积分：1
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DDS_Power
FPGA上的VERILOG语言编程。通过查找表实现直接数字频率合成。在主控部分通过键盘选择正弦波，方波，三角波，斜波，以及四种波形的任意两种的叠加，以及四种波形的叠加；通过控制频率控制字C的大小，以控制输出波形频率，实现1Hz的微调；通过地址变换实现波形相位256级可调；通过DAC0832使波形幅值256级可调；通过FPGA内部RAM实现波形存储回放；并实现了每秒100HZ扫频。(FPGA on the verilog language programming. Lookup table through direct digital frequency synthesis. In part through the control of the keyboard to choose sine, square, triangle wave, sloping wave, and four arbitrary waveform two superposed and the stack of four waveform; by controlling the frequency control word on the size, in order to control the output waveform frequency, 1 Hz to achieve the fine-tuning; Address transform through waveform phase adjustable 256; DAC0832 so through waveform amplitude adjustable 256; FPGA through internal RAM to the waveform storage intervals; and achieve a 100 per second sweep 9999.)
- 2007-04-17 23:43:32下载
- 积分：1
