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axi_jesd204b
ADI JESD204接口的ADC与Xilinx FPGA接口IP,包含Verilog和VHDL源代码,AXI总线接口,ADC串行控制接口(ADI IP for interfacing JESD204 ADC to Xilinx FPGA, include Verilog/VHDL source code, AXI interface and serial config interface
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- 2021-03-29 15:09:10下载
- 积分:1
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Verilog_Basic
说明: Verilog 入门,如果你要很了解Verilog你不用先谖完一本厚厚的书还弄不清楚Verilog到底在干啥事,这份资料有助於快速了斛Verilog(Verilog Basic, If you try very hard to understand verilog by read a thick book, try read this first you will get a quick understanding of verlog.)
- 2010-03-19 09:02:22下载
- 积分:1
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0 2
说明: 基于labVIEW,控制电机等工作实例,程序基本完整(Based on labVIEW, control motor and other working cases, the program is basically complete)
- 2018-01-24 09:09:20下载
- 积分:1
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3.4
移位除乘法器带testbench好用的工程(Useful addition to the shift multiplier works with testbench)
- 2011-07-26 10:54:46下载
- 积分:1
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vhdl4
VHDL Language Reference courses part4
- 2010-02-10 00:52:53下载
- 积分:1
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ditietickets
利用VHDL语言实现地铁售票系统的设计。售票系统根据途经站数自动计算票价(Using VHDL language metro ticket system. Ticketing system automatically calculated according to the number of fares via station)
- 2010-05-07 17:09:35下载
- 积分:1
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基于FPGA的国密算法SM3实现
本模块是基于FPGA实现的国密哈希算法SM3,采用verilog语言进行编程。
- 2023-05-15 06:00:03下载
- 积分:1
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基于Basys3的贪吃蛇小游戏
说明: 基于Basy3的贪吃蛇小游戏,实现了相关功能。(Snake Eating Game Based on Basy3)
- 2021-03-10 20:39:26下载
- 积分:1
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basic_dff
spartan-3e vhdl fpga 输入用滑动按钮代替 输出用led代替(spartan-3e VHDL fpga input with sliding button instead of the output with led instead)
- 2012-04-23 16:40:17下载
- 积分:1
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HDB3
HDB3码在matlab中的仿真,包括原始码、AMI码及HDB码的相关仿真图形(HDB simulink in matlab)
- 2020-07-04 19:40:02下载
- 积分:1