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vhdl4
VHDL Language Reference courses part4
- 2010-02-10 00:52:53下载
- 积分：1
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FPGA
FPGA项目开发实战讲解 [李宪强编著][电子工业出版社][2015.04][248页].pdf(FPGA Project Development combat explain [Li Xingjiang ed] [Electronic Industry Press] [2015.04] [248] .pdf)
- 2016-07-13 08:53:07下载
- 积分：1
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switch--circuit
最近交互式电源技术，软交换、同步整流、频率固定(Alternating expressions Power technology recently、Softswitch, synchronous rectification, fixed frequency)
- 2013-11-25 15:56:17下载
- 积分：1
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ABencode
FPGA实现增量式光栅尺正交脉冲解码，基于Verilog(FPGA realization of incremental grating ruler orthogonal pulse decoding, based on Verilog)
- 2020-11-21 20:59:36下载
- 积分：1
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8051的Verilog
8051的Verilog-Verilog OF 8051
- 2022-06-15 04:13:18下载
- 积分：1
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ass1_3_safe
The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last
- 2011-03-05 01:17:22下载
- 积分：1
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CAN
说明： ZYNQ中 PS 端 CAN接口的基本使用方法，并通过 CAN接口实现与 PC 端 CA N调试软件之间的数据接收和发送(The basic use method of PS end can interface in zynq, and the data receiving and sending with PC end can debugging software through can interface)
- 2020-04-03 16:41:52下载
- 积分：1
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FSM
lap trinh FSM may trang thai
- 2014-10-22 15:56:39下载
- 积分：1
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P4 (3)
支持{addu、subu、lui、ori、jal、jr、lw、sw、nop}指令集的单周期CPU，verilog硬件描述语言实现(Support {addu, subu, lui, ori, jal, jr, lw, sw, nop} instruction set of one-cycle CPU, Verilog hardware description language implementation)
- 2018-12-02 17:22:40下载
- 积分：1
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DDS
基于ARM的DDS信号发生器设计，可以产生各种信号的波形，生成所需要的信号，可供实验用(DDS signal generator based on ARM, can produce a variety of signal waveform can be used for experiment)
- 2013-03-29 18:49:52下载
- 积分：1
