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VERILOG比较器设计
VERILOG比较器设计,属于数字电子技术实验入门的资料。
- 2022-01-31 04:02:11下载
- 积分:1
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suoxianghuan
常用的锁相环技术,此程序是我在设计高频电路中运用的,具体见程序,经调试无问题(Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging)
- 2008-08-19 12:02:31下载
- 积分:1
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AD9764
一个AD9764的基于FPGA的驱动,希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)
- 2013-09-05 01:48:57下载
- 积分:1
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ddr2_controller
A controller for DDR2 on FPGA with vhdl, content testbench, model and textfile-generation/data-detection using python.
- 2015-11-16 00:31:22下载
- 积分:1
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vivado2017+下的HDMI环路视频代码(AX7103)
在黑金AX7103板子上(A7)实现的demo工程中,存在一些bug。给与修正
- 2022-05-12 17:34:33下载
- 积分:1
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NIOSII-Qsys_v1.3.1
黑金刚FPGA开发板使用说明文档,讲诉了NIOS和Qsys的详细开发步奏,值得学习。(KINGBOX FPGA development board documentation, recounts in detail the development of step-outs and Qsys NIOS, it is worth learning.)
- 2015-03-25 13:42:03下载
- 积分:1
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zobrazenie_16_bit_cisla_paralel
16 bit switch input view in hexa format on 7seg display
- 2013-08-16 00:50:49下载
- 积分:1
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xilinx平台DDR3设计教程之仿真篇_中文版教程
DRD3在Xlinix平台上的设计教程以及仿真(DRD3 design tutorial and Simulation on Xlinix platform)
- 2018-11-02 11:18:06下载
- 积分:1
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Baseband_line_code
基于VHDL语言的基带线路码产生电路设计(毕业论文),内涵完整的源代码(Based on VHDL language baseband line code generation circuit design (Thesis), meaning the complete source code)
- 2010-07-03 22:38:09下载
- 积分:1
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FPGASPI
FPGA SPI 主要模块全部涵盖 时序解释 与DSP通信(FPGA SPI Timing interpretation covering all main modules communicate with the DSP)
- 2020-12-09 13:49:20下载
- 积分:1