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awb
自动白平衡的verilog实现
通过逻辑实现了白平衡算法(awb design awb design awb design awb design awb design )
- 2012-09-04 13:09:50下载
- 积分:1
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用例化语句和case语句编写的全加器的VHDL描述。
用例化语句和case语句编写的全加器的VHDL描述。-Of statements were prepared using the full adder of the VHDL description.
- 2022-01-26 02:45:15下载
- 积分:1
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74ls138-integral-4-wire-encoder-16
74ls138组成16..4线编码器 经过本人验证(74ls138 composed of 16 .. 4 line encoder after I verify)
- 2011-09-20 19:00:59下载
- 积分:1
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Verilog语言编写的电话计费系统,这只是源代码,需要在quartusII等软件下运用...
Verilog语言编写的电话计费系统,这只是源代码,需要在quartusII等软件下运用-Verilog language telephone billing system, this is only the source code, the need to use software such as quartusII
- 2023-01-23 23:25:03下载
- 积分:1
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Convolution
卷积程序的Verilog程序,实现卷积功能(Convolution program Verilog program to achieve convolution function)
- 2017-10-14 19:46:22下载
- 积分:1
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ahbapb
说明: AMBA2.0标准的AHB2APb桥,代码通过验证(AMBA2.0 standard AHB2APb Bridge, through the verification code)
- 2008-11-30 23:57:31下载
- 积分:1
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Based on quartus a 3
基于quartus的3-8译码器,可作为大型系统的译码器模块-Based on quartus a 3-8 decoder can be used as large-scale system decoder module
- 2022-03-14 15:00:50下载
- 积分:1
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Viterbi译码器的编解码器的设计
用Verilog实现
Viterbi译码器的编解码器的设计
用Verilog实现-Viterbi decoder。Verilog
- 2022-09-18 21:30:03下载
- 积分:1
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LCD1602
通过编写verilog语言完成数据的在液晶LCD1602显示(By writing verilog language to complete the data displayed on the LCD LCD1602)
- 2013-08-04 13:12:05下载
- 积分:1
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数字频率计毕业论文 不是自己做的
数字频率计毕业论文 不是自己做的-Digital Cymometer thesis do not own. . Ha ha
- 2023-05-02 09:30:02下载
- 积分:1