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xlj
说明： ilx554b型号CCD积分时间程序的设计，包括两座控制信号(program for ilx554b,the driver include two parts single)
- 2010-04-13 00:57:00下载
- 积分：1
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基于altera ep2c8双口RAM
基于altera ep2c8双口RAM -Altera ep2c8-based dual-port RAM
- 2022-11-19 05:15:04下载
- 积分：1
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test bench for alu 6 functions
test bench for alu 6 functions
- 2022-03-02 06:50:51下载
- 积分：1
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srio
fpga平台实现srio通信，以及srio端口寄存器设计。(FPGA platform to achieve sRIO communication, as well as sRIO port register design.)
- 2017-07-09 16:52:45下载
- 积分：1
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a
说明： 利用FPGA实现SDH开销中帧头A1A2的检测(FPGA implementation using SDH overhead in the frame header detection of A1A2)
- 2010-05-25 21:17:03下载
- 积分：1
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Crazy_FPGA_Examples
crazy bingo 韩彬将要出版的新书《FPGA设计技巧与案例开发详解》中的所有配套例程源码，主要涉及视频开发方向。(All the supporting source code routines crazy bingo Han Bin will be published book FPGA design techniques and case development explain in the video, mainly relates to the development direction of.)
- 2020-10-19 18:47:25下载
- 积分：1
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daojishi
用VHDL实现60秒倒计时的功能
倒计时为0时蜂鸣器持续响起(Continued sounded to achieve 60 seconds of the countdown function with VHDL countdown to the 0:00 buzzer)
- 2021-05-07 07:28:36下载
- 积分：1
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verilog hdl verilog hdl verilog hdl
verilog hdl verilog hdl verilog hdl-verilog hdl
- 2022-02-09 22:11:06下载
- 积分：1
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responder3
说明： 基于VHDL的多路抢答器，用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)
- 2019-06-17 15:29:31下载
- 积分：1
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bit7_Binary_to_BCD_LED
二进制转十进制BCD码 Verilog语言 quartusII(Binary to decimal BCD code Verilog language quartusII)
- 2013-09-14 16:49:39下载
- 积分：1
