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作者:新舜唐日期:2008
--author: Suntion Tang
--date: 2008-6-7
-- two warning
--modify: By Suntion Tang at 2008-6-14
--description: 顶层文件,由于此系统简单,
-- 且底层文件不多,故放弃原理图描述,采用VHDL语言描述-author: Suntion Tang date: 2008-6-7 two warning modify: By Suntion Tang at 2008-6-14 description: the top-level documents, as a result of this system is simple, and not more than the bottom of a document, they give up the schematic description of the use of VHDL language description
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cpu_code_8051
vhdl code for 8051 processor
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20190718
uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
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运行在FPGA上的Verilog程序(实现对ADC的控制)
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fir
vhdl code for fir filter
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sha1_v01
基于FIPS 180-4标准的SHA-1算法的verilog HDL实现,分模块分别实现(FIPS 180-4 standard SHA-1 algorithm-based verilog HDL sub-modules, respectively, to achieve)
- 2012-09-20 14:57:19下载
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Synopsys 帮助文件 version 200205
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可综合的Verilog语法和语义,从大学教师cambri…
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lic_Xilinx_ISE_Vivado
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