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基于FPGA 的俄罗斯方块游戏
FPGA上使用硬件描述语言实现俄罗斯方块游戏，该游戏支持PS2键盘输入，VGA视频输出，游戏可以选择不同的难度，同时可以记录显示游戏得分，同时包含VC上位机方块形状编辑器的一整套项目方案
- 2022-11-05 11:50:12下载
- 积分：1
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matlab
matlab file for image contrast..
- 2010-08-18 03:02:21下载
- 积分：1
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NRZ_2_Manchester_Moore
this example exchanges the NRZ code to the MANCHESTER code with moore output
- 2010-01-29 18:46:08下载
- 积分：1
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these files are written in verilog but i am uploading in text format
these files are written in verilog but i am uploading in text format
- 2022-08-19 04:15:42下载
- 积分：1
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LMS
verilog实现的LMS的算法，另外有tb文件可以测试已测试代码正确……(verilog implementation of LMS algorithm, another tb files can test the code has been tested properly ......)
- 2021-03-12 15:29:25下载
- 积分：1
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非常好的SDRAM Controller 设计文档。工程必备
非常好的SDRAM Controller 设计文档。工程必备-SDRAM Controller Design of a very good document. Works required
- 2023-08-30 16:25:04下载
- 积分：1
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Adders, Subtractors, and Multipliers - DE2-115
本练习的目的是检查加法、减法和乘法运算电路。每个
- 2022-03-16 00:57:48下载
- 积分：1
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gtwizard_254_127_ex_1113_3
说明： 配置GTH ip的例子工程，选用7 series 芯片的GTH 113quad的四个通道，在程序中每个链路利用自己的恢复时钟进行数据解码，所以四个通道可以各自独立运行；成功工作在2.54Gb/s的链路状态，长时间（>24小时）的测试，误码率一直为0.(The GTH ip example project is configured with four channels of the GTH 113quad of the 7 series chip. Each link in the program uses its own recovery clock for data decoding, so the four channels can operate independently; the successful operation is at 2.54Gb/ The link state of s, long time (>24 hours) test, the bit error rate has been 0.)
- 2019-06-17 21:33:56下载
- 积分：1
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gmii_tx_mac
实现千兆以太网数据发送，通过GMII接口向PHY写数据，控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)
- 2013-08-08 15:24:43下载
- 积分：1
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formal_verification
说明： 现在最流行的RTL设计方法之一，本书为全球流行的设计入门书籍(One of the most popular RTL design methods nowadays, this book is an introductory book for popular design all over the world.)
- 2020-06-23 22:00:02下载
- 积分：1
