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本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.
本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.-I prepared for the sentinel division, the development of software for the ISE6.2 Xilinx, PAR through simulation.
- 2022-09-14 19:00:03下载
- 积分:1
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数字频率计毕业论文 不是自己做的
数字频率计毕业论文 不是自己做的-Digital Cymometer thesis do not own. . Ha ha
- 2023-05-02 09:30:02下载
- 积分:1
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VHDL basic computing, the use of 8bit for the multiplier, will be the value of t...
VHDL基本运算,采用8位为乘法器,将两个8位字符串的值输入相乘后
- 2023-07-23 02:35:07下载
- 积分:1
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TRY-1516-CSV0115--- SANGEETHA
说明: VHDL BASED DATA COMPRESSION
- 2019-01-01 16:37:53下载
- 积分:1
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digital-processing-with-FPGA
vhdl语言,国外教材,数字信号处理算法(vhdl language, foreign materials, digital signal processing algorithms)
- 2016-07-22 21:53:49下载
- 积分:1
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uart串行口,用Verilog编写的.供大家参考
uart串行口,用Verilog编写的.供大家参考-uart serial port, using Verilog prepared. For your reference
- 2022-07-17 22:14:09下载
- 积分:1
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控制ADV212 压缩的源代码 使用xilinx edk开发环境
控制ADV212 压缩的源代码 使用xilinx edk开发环境(adv 212 controller, using xilinx edk)
- 2020-06-27 03:40:01下载
- 积分:1
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FPGA to do VGA communication details, I am looking for a long time before starti...
FPGA做VGA通讯的详细资料,我找了很久才收集起的,很有用,可供初学者学习实用-FPGA to do VGA communication details, I am looking for a long time before starting the collection, very useful for beginners to learn practical
- 2023-03-10 18:55:03下载
- 积分:1
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cn1
在MATLAB的SIMULINK中,用DSPBUILDER实现计数功能,控制LED指示灯.(In MATLAB SIMULINK, DSPBUILDER is used to realize counting function and control LED indicator lamp.)
- 2018-08-16 15:35:47下载
- 积分:1
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uvm_use_pipelined_ahb
一个简单的uvm搭建的ahb简单实例,包含了各个组件以及编译的运行的脚本(one sample example about ahb,include every component and compile script)
- 2020-10-21 12:17:24下载
- 积分:1