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ADc
与单片机相比，用CPLD/FPGA器件更适合于直接对高速AD采样控制。本实验接口器件为ADC0809，根据ADC0809的工作时序使用CPLD产生该控制信号，CPLD启动AD转换后，得到的数据送至单片机并在PC机及数码管上显示AD转换结果。(Compared with the microcontroller, CPLD/FPGA devices more suitable for direct sampling control of high-speed AD. The interface of the experimental device for the ADC0809 ADC0809 Timing CPLD is used to generate the control signal, the CPLD to start the AD conversion, the data sent to the microcontroller and the AD conversion result on the PC and digital tube display)
- 2021-03-29 11:19:10下载
- 积分：1
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FPGA
基于FPGA的视觉电生理图像刺激系统的设计(Based on the design of FPGA visual electrophysiology image stimulation system)
- 2013-03-08 17:09:29下载
- 积分：1
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xp2syscloclkpll
这个是讲pll的具体用法的,一般在fpga设计中都会用到 他,这个是lattice的xp2的pll的介绍,不过,fpga 都是相通的其他两家也差不多(Pll say this is the specific usage, the general design in the FPGA will use him, this is the lattice of the pll of xp2 introduction, however, fpga are connected to other two similar)
- 2007-10-31 21:03:07下载
- 积分：1
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Kluwer.Academic.The.Verilog.Hardware.Description
Kluwer academic the verilog hardware description language fith edition
- 2014-10-08 08:11:42下载
- 积分：1
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ad7606
AD7606采集代码，用于verilog 驱动 AD7606 adc SPI 串口方式(AD7606 acquisition code, used for Verilog drive AD7606 ADC SPI serial mode)
- 2021-05-12 18:30:02下载
- 积分：1
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VER_I2C_EEPROM
EEPROM 的verilog仿真模型（cat24cxx系列）(verilog simulition Model of EEPROM,include cat24cxx)
- 2016-10-15 11:37:50下载
- 积分：1
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VHDL prepared by the FIR filter source for Embedded designers have a good role i...
VHDL语言编写的FIR滤波器源码
对于嵌入式设计者有很好的指导作用
-VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding
- 2022-06-17 20:08:46下载
- 积分：1
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and they simply based on the mouse xinlinx ideally VHDL application procedures,...
基于fpga和xinlinx ise的鼠标应用vhdl程序，希望对你有所帮助！-and they simply based on the mouse xinlinx ideally VHDL application procedures, and I hope to help you!
- 2022-02-18 14:46:28下载
- 积分：1
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ddr3_model
一个verilog语言开发编写的简单的ddr3模型(A simple model ddr3, written with verilog language)
- 2020-08-26 17:38:13下载
- 积分：1
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VHDL_modelling_guidelines是vhdl建模开发的指导资料
VHDL_modelling_guidelines是vhdl建模开发的指导资料-VHDL modeling VHDL_modelling_guidelines is guiding the development of information
- 2022-03-12 23:37:10下载
- 积分：1
