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sdh_pointer_deal
文件描述的是SDH 指针处理和系统同步代码 veriolg(SDH pointer processing and system synchronization code veriolg of file Description)
- 2012-09-07 16:17:40下载
- 积分:1
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Version1
小波包分解,重构轴承振动信号,Hilbert包络,FFT进行频谱分析,以获得轴承故障频率。(Wavelet packet decomposition, reconstruction of bearing vibration signal, Hilbert envelope, FFT spectrum analysis to obtain the bearing fault frequencies.)
- 2013-07-17 11:37:05下载
- 积分:1
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基于FPGA的JPEG图像压缩芯片设计
基于FPGA的JPEG图像压缩芯片设计 -FPGA-based JPEG image compression chip design
- 2022-01-28 02:00:46下载
- 积分:1
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芦苇
reed-solomon译码器。共有7个文件,分别为译码器的7个模块。-reed-solomon decoder. A total of seven papers, respectively, the decoder module 7.
- 2022-02-01 03:32:01下载
- 积分:1
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vhdl实现vga接口设计,非常实用的一段代码,学习用
vhdl实现vga接口设计,非常实用的一段代码,学习用-vhdl achieve vga interface design
- 2023-05-25 04:40:03下载
- 积分:1
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uart-for-fpga
说明: Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA.
Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit!
The UART controller was simulated and tested in hardware.
- 2020-06-24 22:00:02下载
- 积分:1
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sample_wave
可以产生8比特的采样波形,非常不错的VHDL程序(Sampling can produce 8-bit waveform, very good VHDL program)
- 2010-10-12 20:03:07下载
- 积分:1
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VHDL
vhdl 让你更加熟悉掌握这么硬件电路设计语言 非常清晰(vhdl)
- 2010-07-22 07:30:20下载
- 积分:1
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shumagua
通过数码管和单片机的组合 制作成的数码管时钟程序(Through the combination of digital control and made into a single-chip digital clock program)
- 2013-10-27 12:30:04下载
- 积分:1
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EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。...
EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。-EP2C35 official development board schematics, is altera of official information. Fpga circuit design is a good reference model.
- 2022-07-01 18:31:57下载
- 积分:1