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用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。...
用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。-VHDL language using FPGA-based waveform generator. Does the need for experimental waveforms generated very useful.
- 2022-05-22 13:12:54下载
- 积分:1
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SystemVerilog验证++测试平台编写指南
说明: 基于sv的uvm平台搭建实战,对于验证方法学来说,分层的测试平台是一个关键的概念。虽然分层似乎会使测试平台变得更复杂,但它能够把代码分而治之,有助于减轻工作负担,而且重复利用效率提升。验证平台可以类似分为五个层次:信号层、命令层、功能层、场景层和测试层。(Construction of UVM platform based on SV)
- 2020-07-19 16:18:46下载
- 积分:1
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CPU
使用QuartusII软件,利用VHDL语言设计实现CPU,其中包含时序图仿真。(Using software QuartusII, using VHDL language to design the CPU, which contains sequence diagram simulation.)
- 2015-07-22 16:23:52下载
- 积分:1
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这个程序是基于等精度测频原理的频率计,用VHDL语言实现,频率测量测量范围1~9999;用4位带小数点数码管显示其频率,并且具有超量程、欠量程提示功能。...
这个程序是基于等精度测频原理的频率计,用VHDL语言实现,频率测量测量范围1~9999;用4位带小数点数码管显示其频率,并且具有超量程、欠量程提示功能。-This procedure is based on the principle of frequency measurement accuracy, such as the frequency meter, using VHDL language, frequency measurement range 1 ~ 9999 with four decimal places with the frequency of the digital display and has a super-range, less range prompts.
- 2022-03-04 13:27:35下载
- 积分:1
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一个简单的总线bus代码,初学者可以借鉴学习
一个简单的总线bus代码,初学者可以借鉴学习-A simple bus-bus code, beginners can learn to learn
- 2022-04-24 12:38:35下载
- 积分:1
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h_adder
ise13.2环境下VHDL编写的半加器器+仿真波形(ise13.2 environment half adder in VHDL simulation waveform control+)
- 2013-06-01 13:40:03下载
- 积分:1
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该程序实现的是n位全加器,首先用与非门实现一位全家器,最后实现n位的全加器。...
该程序实现的是n位全加器,首先用与非门实现一位全家器,最后实现n位的全加器。-the program is to achieve the n-bit full adder, first using the door with non-realization of a family- and finally realize the full n-bit adder.
- 2022-01-24 17:35:43下载
- 积分:1
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cam2
DE2-115 + D5M Camera to VGA PC
- 2020-07-09 19:48:55下载
- 积分:1
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Verilog_HDL
华为文档《硬件描述语言Verilog基础》-目录
原来搞VHDL,刚刚开始学Verilog。觉得这个入门的提纲不错,共享一下。
(Huawei Documents " basic Verilog Hardware Description Language" - the original directory engage in VHDL, just beginning to learn Verilog. Feel that the entry of the outline of a good, share some.)
- 2009-02-21 18:02:37下载
- 积分:1
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业界标准的Verilog语法格式
说明: verilog标准语法,还有很多的样例参考,学习的好资料。(Verilog standard grammar, there are many examples for reference, good learning materials.)
- 2020-06-15 22:50:02下载
- 积分:1