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CPU
不同方法实现的CPU系统。同样支持加减乘，逻辑/算术移位，与或非等建议指令。(Different methods to achieve CPU system. Also supports, subtraction, multiplication, logic/arithmetic shift, and the like or recommend instruction.)
- 2016-04-16 20:30:51下载
- 积分：1
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Enc8b10b
说明： serdes中的8B/10B编码 verilog实现(Implementation of 8B / 10B coding Verilog)
- 2020-09-13 01:37:58下载
- 积分：1
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FPGA
数字钟的VHDL语言程序，包含了好几个模块，是毕业设计的优秀程序，值得下载！(VHDL language program of digital clock, contains several modules, is an excellent program, graduation design is worth to download!)
- 2015-08-31 21:07:44下载
- 积分：1
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it is a multiplier used in RIsc architecture based processor.......
it is a multiplier used in RIsc architecture based processor.......
- 2022-08-09 07:53:07下载
- 积分：1
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3-8译码器实验
3-8译码器实验，用三个拨码开关控制8个LED中某一个点亮
- 2023-05-23 17:35:03下载
- 积分：1
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HUAWEI_FPGA
华为内部资料，华为FPGA全套资料，包括华为的专利设计(Internal information Huawei Huawei FPGA complete information, including Huawei' s patented design)
- 2020-12-21 18:19:08下载
- 积分：1
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jpeg_fpga
基于FPGA的JPEG解码，对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)
- 2014-02-24 09:19:22下载
- 积分：1
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alu
说明： VHDL实现的算术逻辑计算单元（ALU），包括modersim测试文件，即仿真结果。(VHDL implementation of the arithmetic logic calculation unit (ALU), including modersim test file, the simulation results.)
- 2011-03-26 21:18:01下载
- 积分：1
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实验12
说明： 数字逻辑实验课第十二次作业，基于Verilog的Clock时钟(Clock based on Verilog)
- 2021-03-11 15:03:46下载
- 积分：1
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task_function
自己编写的一个verilog HDL小程序，实现基本的task调用function的功能，对初学者有用。在xilinx的ISE仿真调试通过(I have written a verilog HDL small procedures, to achieve the basic function of the task to call the function, useful for beginners. In Xilinx s ISE simulation debugging through)
- 2008-06-26 21:21:23下载
- 积分：1
