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aaa
这是一些小代码的集合
希望能对大家有所帮助(This is a collection of some small code for all of us hope to be helpful)
- 2007-11-16 06:19:33下载
- 积分:1
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ccd_tcp1209d-driver
ccd驱动程序,刺程序是tcd1209的驱动程序,能够修改积分时间(ccd driver stabbed program is tcd1209 driver can modify the integration time)
- 2021-02-23 09:49:40下载
- 积分:1
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psk_rician-channel-MATLAB
QPSK在赖斯信道下的模拟仿真,包括K=6和K=10下的情况(QPSK in, Laisi Xin Road, under the simulation, including the case of K = 6 and K = 10 under)
- 2013-04-26 21:30:18下载
- 积分:1
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StopWatch
This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.
- 2013-10-04 00:53:49下载
- 积分:1
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buffer for in/out data.
buffer for in/out data.
- 2023-02-22 20:05:04下载
- 积分:1
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VHDL硬件描述语言作业
VHDL硬件描述语言作业-VHDL hardware description language operations
- 2022-03-19 16:26:25下载
- 积分:1
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vhdl写的ds18b20程序,相互交流
vhdl写的ds18b20程序,相互交流-vhdl written ds18b20 procedures, mutual exchange
- 2022-03-19 16:58:50下载
- 积分:1
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NIOS II IDE 编程, uart_txd测试程序,仅供参考。
NIOS II IDE 编程, uart_txd测试程序,仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.
- 2022-05-23 19:16:50下载
- 积分:1
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VGA字符显示VHDL程序
可以直接用于工程的设计与开发
VGA字符显示VHDL程序
可以直接用于工程的设计与开发-VGA display characters can be directly used for VHDL design and development
- 2022-01-24 18:21:47下载
- 积分:1
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MATLAB产生单脉冲信号的数据 exp_rom
说明: 通过MATLAB产生单脉冲信号的数据,存储下来作为verilog代码实现的DDS的数据源,用于验证DA数据的ddio的调试是否有问题。(The data of monopulse signal generated by MATLAB is stored as the data source of DDS implemented by Verilog code to verify whether the ddio debugging of DA data is problematic.)
- 2020-06-23 04:40:02下载
- 积分:1