-
verilogCRC32
32位bit输入的CRC32校验,verilog的代码,以及modelsim的testbench代码(The encode of CRC32 with 32bit-inputs based on verilog, and according encode of testbench)
- 2012-03-07 10:22:58下载
- 积分:1
-
Get-20-point
this program get 20 point from user and draw functions.
- 2014-01-09 03:25:06下载
- 积分:1
-
LDPC.DIFFERENT-RATE
LDPC码不同码率对比,1/2与1/3码率对比。码长512.迭代次数50次。(Comparison of different rate of the LDPC code, 1/2 compared with the 1/3 code rate. 512 yards long. 50 times the number of iterations.)
- 2012-11-22 10:49:22下载
- 积分:1
-
74LS
数字逻辑与系统的关于所有的器件74LS的介绍,功能表(Digital Logic and System devices 74LS on the introduction of all the menu)
- 2010-12-30 17:27:19下载
- 积分:1
-
xilinx 开发板程序,LED灯控制程序
xilinx 开发板程序,LED灯控制程序-Xilinx development board procedures, LED lamp control procedures
- 2022-08-08 23:14:07下载
- 积分:1
-
一个简单的曼彻斯特编码器,将串行数据转换为曼彻斯特编码数据。
A simple Manchester Encoder to convert serial data to Manchester encoded data.
- 2022-06-20 14:27:09下载
- 积分:1
-
AN66806
提供了利用 GPIF 对 FX2LP 与同步 FIFO CY7C4625-15AC 之间的接口进行设计的源代码(Provides for the use of GPIF FX2LP and synchronization FIFO CY7C4625-15AC to design the interface between the source code)
- 2013-08-13 14:42:55下载
- 积分:1
-
FPGA-OFDM-communication-system
说明: 基于ofdm系统的各个模块的VHDL程序,软件是用的ISE仿真的。绝对有用。(Ofdm systems based on VHDL program of each module, the software is to use the ISE simulation. Absolutely useful.)
- 2011-03-18 16:58:35下载
- 积分:1
-
StopWatch
This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.
- 2013-10-04 00:53:49下载
- 积分:1
-
对视频编解码芯片ADV7181进行合理的配置,使其输出符合ITUR656标准的视频流...
对视频编解码芯片ADV7181进行合理的配置,使其输出符合ITUR656标准的视频流-Of the ADV7181 video decoder chip for a reasonable configuration, so that the output in line with the standard video streaming ITUR656
- 2022-04-30 04:07:22下载
- 积分:1