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5位计数器
应用背景计数器是一个连续的电路，计数。这意味着它的收益通过一个预先定义的序列的状态的电路的状态是由所有的触发器的状态决定的。最基本的计数器将只增加1的每一个时钟脉冲，所以状态100将达到101，下一个脉冲将让它切换到110这是可能的设计与任何需要计数的计数器序列。关键技术频率计数器数字钟时间测量模数转换器分频电路数字三角波发生器。
- 2022-03-15 12:52:08下载
- 积分：1
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LCD_game2
LCD显示超级玛丽游戏2 (LCD display Super Mario game)
- 2012-09-03 21:58:48下载
- 积分：1
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multiply
由verilog编写的乘法器，通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分：1
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bt656_decode
说明： 将嵌入式BT656格式数据解码出带行场同步信号的YCbCr422格式数据(Decoding Embedded BT656 Format Data to YCbCr422 Format Data with Field Synchronization Signa)
- 2021-01-28 10:38:35下载
- 积分：1
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Shumaguan
在BASYS3上实现跑马灯的功能。第一LED交替闪烁；第二LED由左至右逐个变亮，再逐个变暗；第三LED由右至左逐个变亮，再逐个变暗；第四LED由两边逐个变亮，再从中间逐个变暗。(Realize the function of the horse light on BASYS3. The first LED flashes alternately; second LED brightens from left to right and then darkens one by one; the third LED turns from right to left, then darkens one by one, and then darkens one by one; fourth LED is brightened by both sides, and then darkening from the middle.)
- 2018-06-21 11:06:16下载
- 积分：1
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AD9764
一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)
- 2013-09-05 01:48:57下载
- 积分：1
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eBook_Verilog_HDL--Guide_to_Digital_Design_Synthes
说明： 对于有经验的用户和新用户写的，这本书给您的Verilog HDL的广泛报道。该书强调了实际设计和验证的角度，而不是只注重Verilog的语言方面。(Written for both experienced and new users, this book gives you broad coverage of Verilog HDL. The book stresses the practical design and verification perspective ofVerilog rather than emphasizing only the language aspects. )
- 2010-04-15 01:27:30下载
- 积分：1
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ps2键盘输入RS232串口输出（已验证）
ps2键盘输入， RS232串口输出键值（已验证）
- 2022-03-07 06:21:05下载
- 积分：1
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divid5_VERILOG
VERILOG实现无分频时钟，包括测试文件，经过验证可用(VERILOG is no difference between the frequency of the clock implementation, including test papers, can be used after authentication)
- 2009-03-30 15:11:30下载
- 积分：1
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BPSK
先用Matlab理论仿真，再用Verilog语言在ISE环境下编写程序，可通过手机发送指令来控制上下变频器的参数。(Firstly, we use the theory of MATLAB to simulate, and then use Verilog language to write programs in ISE environment. The parameters of up-down converter can be controlled by sending instructions from mobile phone.)
- 2020-06-19 22:40:02下载
- 积分：1
