-
clock
Quartus II软件设计数字电子钟,使用verilog语言编写各个
模块生成symbol files,再用原理图方式制作顶层文件。
完成的功能有:能够显示时、分、秒;具有清零,调节分钟的功能;
具有整点报时功能,声响电路发出叫声;
(failed to translate)
- 2013-05-07 10:11:31下载
- 积分:1
-
cnt60
六十进制计数器,VHDL编写的计数器,本科电子的可能有些实验可以用到(counter Possible experiments of undergraduate electronics can be used)
- 2021-04-07 11:59:01下载
- 积分:1
-
Tempe_deteV2.1
说明: FPGA接收串口UART发来的指令设定温度报警值,实时采集DS18B20温度传感器并显示,带报警功能(FPGA receives the instruction from UART, sets the temperature alarm value, collects and displays DS18B20 temperature sensor in real time, with alarm function)
- 2021-04-13 13:28:56下载
- 积分:1
-
加法器
说明: 4位加法器,4位数字相加及进位功能的实现,主要利用Verilog语言实现,简单轻松,且代码量少(a adder which can realize 4 bit numbers adding)
- 2020-10-31 11:05:41下载
- 积分:1
-
实现DESAESsbox
高级加密标准(英语:Advanced Encryption Standard,缩写:AES),在密码学 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2022-05-14 06:37:49下载
- 积分:1
-
FRFT_Ozaktas
这是分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序,FPGA是Xilinx的virtecx-5,这是我在做毕业设计的时候自己编写的,希望能对你有帮助!(This is the fractional Fourier transform algorithm FRFT Turkish FPGA implementation of the program, FPGA is the Xilinx virtecx-5, which is what I was doing graduate design time I have written, I hope you can help!)
- 2021-03-12 10:49:25下载
- 积分:1
-
BmpDecoder
适用于Altera FPGA Nios II平台uClinux OpenCV之BmpDecoder的源码(Souce code of BmpDecoder for Altera FPGA Nios II uClinux OpenCV)
- 2011-02-11 16:43:45下载
- 积分:1
-
wishbone
wishbone接口的设计,在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)
- 2012-12-05 12:22:24下载
- 积分:1
-
DAC_sinewave_timer_int
8051 1Khz sine wave generator. make use of DAC0808 and timer 0 interrupt. Also single led is blinked continuously.
- 2011-12-12 13:19:08下载
- 积分:1
-
TimeQuest就一定要搞定
时序约束方面的经典文章,适合学习FPGA的初学者(A classic article on timing constraints, suitable for beginners to learn FPGA)
- 2018-02-28 11:08:32下载
- 积分:1