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vhdl training
Five day stmicroelectornics vhdl training presentation
- 2018-08-14 21:51:58下载
- 积分：1
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calculator_final
清华大学电子课程设计：Verilog，QuartusII可正确运行，可下载到FPGA上，音乐计算器，完成两个三位数的运算，有注释，很强大！！(Verilog, QuartusII run correctly, can be downloaded to the FPGA, music, calculator, completed two three-digit operations, there are notes, very powerful! !)
- 2020-08-16 23:38:25下载
- 积分：1
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vhdljiaochengCDROM
《VHDL程序设计教程》光盘使用说明
本光盘是邢建平和曾繁太所著《VHDL程序设计教程》一书的配书光盘。本光盘的著作权归作者所有。
清华大学出版社享有该光盘的中文简体版专有出版权。
本光盘包括如下目录：
“e_teaching_vhdl”--CAI教学材料
包含全套的PowerPoint文件，可以直接用于教学，具体请参见该目录中的index.pps文件说明。
共包含前言、第一章到第六章的教学文件。目前包含的为中文版辅助材料。
“vhdl fortextboot”--教程代码
包含本书教程例子的所有代码。
“vhdl for lab”--教程实验部分代码
包含本书教程实验部分所有代码。
“vhdl solutions”--教程习题参考解答
包含本书教程习题参考解答的文档。
“class music”--课间休息音乐欣赏
包含课间休息的中外音乐欣赏。
("VHDL Programming Guide" CD-ROM for use
This disc is too SENSORS and Tseng Fan book "VHDL Programming Guide," a book with the book CD. Of the copyright of the CD-ROM of all.
Tsinghua University Press entitled The Simplified Chinese version of the CD exclusive copyright.
This CD includes the following directories:
"E_teaching_vhdl"- CAI teaching materials
Contains the full set of PowerPoint files can be directly used in teaching, specifically refer to the directory index.pps documentation.
Contains a total of introduction, the first chapter to the sixth chapter of the teaching file. Currently contained in the supplementary material for the Chinese version.
"Vhdl fortextboot"- Tutorial code
Tutorial examples include all of the code book.
"Vhdl for lab"- Tutorial test sections of code
Experimental part of the tutorial contains all the code book.
"Vhdl solutions"- solutions for reference Tutorial exercises
Reference bo)
- 2010-11-29 14:25:51下载
- 积分：1
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AXI-HP-PDMAPGIC
本文参考了Xilinx 官方文档UG873，“System Design Using Processing System High
Performance Slave Port”。主要实现了PL 中AXI CDMA IP 与PS 部分HP64bit 从接口集成。
本例中AXI CDMA 部分扮演主机，从PS 部分DDR 系统内存中源缓冲区拷贝一列数据到目
的缓冲区。可以分别采用裸机工程和基于Linux 的应用软件来实现功能。(This reference to the official document Xilinx UG873, " System Design Using Processing System High Performance Slave Port" . The main achievement of the PL in AXI CDMA IP interface integration with PS part HP64bit. In this example AXI CDMA part to play host, a copy of a column of data into the destination buffer section PS source DDR system memory buffer. Can respectively bare engineering and Linux-based applications to achieve functional.)
- 2014-12-23 10:27:24下载
- 积分：1
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Microsoft-Word--(11)
信号源模块源程序,可以实现程序模块的实现，然后发生需要的程序(Source module source code, you can achieve the realization of the program modules, and the occurrence of the required procedures)
- 2014-12-30 11:12:32下载
- 积分：1
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Time_setting
时间设置 可以作为设计中的一个小模块进行使用 方便快捷(time setting)
- 2012-03-30 10:12:28下载
- 积分：1
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基于basys2的四位有符号二进数除法
基于diligent公司的basys2开发板的四位有符号二进制数的除法
- 2023-08-01 03:30:03下载
- 积分：1
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20181060261-李康_3
说明： 秒表的实现，有暂停清零功能，Quartus II(Stopwatch realization, has the pause clear function)
- 2020-12-26 15:56:03下载
- 积分：1
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EEPROM_RD_WR
本程序包含：EEPROM的功能模型(eeprom.v)、读/写EEPROM的verilog HDL 行为模块（eeprom_wr.v）、信号产生模块（signal.v）和顶层模块(top.v) ，这样可以有一个完整的EEPROM的控制模块和测试文件，本文件通过测试。(This procedure includes: EEPROM of the functional model (eeprom.v), read/write EEPROM acts of verilog HDL modules (eeprom_wr.v), signal generator module (signal.v) and top-level module (top.v), this can have a EEPROM complete control module and test document, this document is to pass the test.)
- 2008-12-23 15:04:20下载
- 积分：1
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这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化...
这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences
- 2022-11-02 21:30:03下载
- 积分：1
