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Xilinx
Xilinx的I2C总线控制器,verilog版本,文档号是XAPP333,可到Xilinx网上查找具体说明,有对应的VHDL版本的-Xilinx
- 2022-07-04 07:06:06下载
- 积分:1
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Convolutional code encoder and Viterbi decoding to achieve
卷积码编码及其Viterbi译码的实现-Convolutional code encoder and Viterbi decoding to achieve
- 2022-01-28 03:11:57下载
- 积分:1
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ds18b20
verilog编写的ds18b20温度传感器程序,可综合(ds18b20 program written in verilog)
- 2020-10-29 10:29:56下载
- 积分:1
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can-lite-vhdl-master
说明: CAN VHDL Code. Behavioral implementation of CAN bus interface.
- 2021-01-19 21:48:41下载
- 积分:1
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application-in-card-and-servo-drive
AB相编码器解码接口_PWM输出SOPC方案及其在运动控制卡和伺服驱动器中的应用(AB phase encoder decoder interface _PWM output SOPC program and its application in motion control card and servo drive)
- 2012-03-22 12:44:52下载
- 积分:1
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交织和解交织模块,采用矩阵交织方式,且有两套并行存储器,可以实现连续数据流操作,不会有数据滞留和丢失...
交织和解交织模块,采用矩阵交织方式,且有两套并行存储器,可以实现连续数据流操作,不会有数据滞留和丢失-Intertwined intertwined reconciliation module, interwoven matrix approach, and has two sets of parallel memory, you can realize continuous data stream operations, will not have data retention and loss
- 2022-01-30 11:03:35下载
- 积分:1
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multiply
由verilog编写的乘法器,通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分:1
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unit5
低频数字式相位测量仪
使用的VHDL语言,在MUXPLUS2环境下使用!
(digit hpase detecter use for low-frequence)
- 2010-05-07 17:00:35下载
- 积分:1
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在quartus中使用IP核的实际例子与流程
在quartus中使用IP核的实际例子与流程-The use of IP in the Quartus practical examples and nuclear flow
- 2022-08-07 01:33:34下载
- 积分:1
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PCI总线仲裁参考设计,Quicklogic提供的verilog代码
PCI总线仲裁参考设计,Quicklogic提供的verilog代码-PCI bus arbitration reference design, pioneered the Verilog code
- 2022-03-11 02:19:45下载
- 积分:1