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实验九 计算机核心(CPU+RAM)的设计与实现
计算机组成原理的CPU实验,基于quartus平台(CPU experiment of computer organization principle, based on quartus platform)
- 2018-06-09 11:13:43下载
- 积分:1
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键盘输入液晶模块显示字符,在液晶显示屏上显示从PS2键盘输入的字符...
键盘输入液晶模块显示字符,在液晶显示屏上显示从PS2键盘输入的字符-Keyboard input LCD display module characters displayed in the LCD screen from the PS2 keyboard input characters
- 2022-10-02 08:20:03下载
- 积分:1
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my_lift
电梯控制,包括楼层按键相应,显示上下状态。(Elevator control, including the floors of the corresponding button to show the whole state.)
- 2008-04-24 10:15:52下载
- 积分:1
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VHDL 100个例子
网上分享的一段100例子,适合FPGA学习的初学者。内部还有一些经典实用技巧。
- 2022-07-27 14:30:28下载
- 积分:1
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本程序实现任意占空比产生,已经在easyfpga030综合过
本程序实现任意占空比产生,已经在easyfpga030综合过-This procedure generated to achieve an arbitrary duty cycle
- 2022-08-03 13:14:41下载
- 积分:1
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下午5点的代码及说明,verilog代码,几乎所有的IC面试都会问…
5分代码及说明,verilog代码,几乎所有的IC面试都会问到这个问题,所以总结了一下发了上来,共同学习!-5 pm code and explanations verilog code Almost all the interviews will IC asked this question, summed up in the ranks about fat, learn together!
- 2022-02-21 11:34:44下载
- 积分:1
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MIPSTOP
说明: misp顶层文件,verilog实现misp架构,并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)
- 2020-06-18 04:40:02下载
- 积分:1
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bt656_to_yuv422
从bt656数据流中提取出同步信号, 适合于搞fpga/cpld开发调式(bt656 internel sync to extern sync singal,
bt656 internel sync to extern sync singal)
- 2021-03-06 11:19:30下载
- 积分:1
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TOFED_Dataflow
Take its complement by applying DeMorgan’s theorem to obtain F in the form of product of complemented products.
- 2014-11-08 06:56:35下载
- 积分:1
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tsobbellh
这是我本人自己开发的可用于256*256大小的图像进行sobel边缘检测的vhd文件,可在QuartusII或MaxplisII下综合与与仿真,并在FPGA上测试过。能进行修改支持其他大小图像的sobeel边缘检测,同时还能实现其它的图像模块化处理算法,例如高斯滤波,平滑等。
(This is my own development vhd file, can be used for 256* 256 size image sobel edge detection under QuartusII or MaxplisII synthesis and with simulation, and tested on FPGA. Can be modified to support other sobeel size image edge detection, while still achieving other image the modular processing algorithms, such as Gaussian filtering and smoothing.)
- 2012-08-23 22:17:19下载
- 积分:1