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vc707-ucf-xdc-rdf0155-rev2-0
vc707 board ucf xdc files
- 2018-06-14 05:50:36下载
- 积分：1
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jt2
基于FPGA的交通灯代码，VHDL语言书写。适合新手学习vhdl语言时使用(FPGA-based traffic light code, VHDL language writing. Suitable for novice learning vhdl language used when)
- 2013-10-26 13:30:26下载
- 积分：1
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LnE
verilog写的LnE算法，可用于计算指数和对数(Verilog written in LnE algorithm, can be used to calculate the index and the logarithm)
- 2020-06-30 04:40:02下载
- 积分：1
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Vhdl_testbench
vhdl 的testbench编写教程，英文ppt以及源码工程(Write tutorials, as well as English ppt Source of engineering vhdl testbench)
- 2016-08-29 10:09:05下载
- 积分：1
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利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！...
利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware description language of the people to see!
- 2023-02-04 05:25:03下载
- 积分：1
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VHDL language used to write the VGA control procedures have been verified, the a...
用VHDL语言写的VGA 控制程序，已经验证过，绝对好用！-VHDL language used to write the VGA control procedures have been verified, the absolute ease of use!
- 2022-01-23 11:20:28下载
- 积分：1
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SASX
Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC
- 2020-06-24 11:40:02下载
- 积分：1
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design_pcie-based-on-FPGA
the interface design of pcie based on FPGA
- 2015-12-17 15:52:45下载
- 积分：1
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CY7C63723
CY7C63723 功能及其引脚描述，外围电路和仿真数据(The CY7C637 is an 8-bit RISC OTP microcontroller.)
- 2009-07-13 14:30:05下载
- 积分：1
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Verilog_add_div_multi_exp
使用verilog写的32位浮点数加法模块、浮点数乘法模块、浮点数除法模块、浮点数指数模块。指数模块是综合前面三个例化成泰勒级数求指数，迭代次数（可设置）决定了精度。(Use verilog write 32-bit floating-point addition module, floating-point multiplication module, floating-point division module, the floating point number index module.Index module is a comprehensive index of the front three cases into Taylor series for calculating index, the number of iterations can be set to determine the precision)
- 2020-12-18 09:49:10下载
- 积分：1
