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AT070TN83
at070tn83 800x480 tft lcd verilog 測試 quartus 文件 (800x480 tft lcd at070tn83 testing project file)
- 2020-12-07 15:39:21下载
- 积分:1
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VHDL_modelling_guidelines是vhdl建模开发的指导资料
VHDL_modelling_guidelines是vhdl建模开发的指导资料-VHDL modeling VHDL_modelling_guidelines is guiding the development of information
- 2022-03-12 23:37:10下载
- 积分:1
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ran_num_generator.tar
vhdl random numbergenerater
- 2013-04-10 16:31:28下载
- 积分:1
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FPGA下PWM的Verilog 源码,含目标程序,可直接下载使用,可用在电机控制中...
FPGA下PWM的Verilog 源码,含目标程序,可直接下载使用,可用在电机控制中-FPGA in Verilog source code under the PWM, including the target program, can be directly downloaded to use, can be used in motor control in
- 2022-07-04 10:40:23下载
- 积分:1
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RS-code
说明: 我测试过的!Verilog HDL实现RS编码。(I' ve tested it! RS coding Verilog HDL implementation.)
- 2010-04-12 20:30:36下载
- 积分:1
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03-verilog-11
Verilog reference book
- 2015-02-06 09:03:48下载
- 积分:1
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Verilog_Basic
说明: Verilog 入门,如果你要很了解Verilog你不用先谖完一本厚厚的书还弄不清楚Verilog到底在干啥事,这份资料有助於快速了斛Verilog(Verilog Basic, If you try very hard to understand verilog by read a thick book, try read this first you will get a quick understanding of verlog.)
- 2010-03-19 09:02:22下载
- 积分:1
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Practical program code, in the hope that useful to everybody, has debugging thro...
实用的程序代码,希望对大家有用,已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
- 2023-05-31 22:10:04下载
- 积分:1
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spi
该程序是一个可完成订制化的SPI双向总线接口,时钟相位、极性,以及分频比全部可通过寄存器进行配置,已经在ISE下通过综合,占用资源少,强烈推荐
(The program is a complete custom of SPI bidirectional bus interface, clock phase, polarity, and the divider ratio can all be configured through the register, has been in the ISE through an integrated, small footprint, it is strongly recommended)
- 2013-07-02 14:07:16下载
- 积分:1
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VENDTEST
此为实现第14.7.9章所需的激励文件
该代码为门级RTL描述。(Stimulus file to verify Section 14.7.9
the functionality of
gate vs. RTL description.)
- 2011-08-11 15:07:16下载
- 积分:1