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如何发现和解决FPGA设计偏移时序约束问题
如何发现并解决FPGA设计中的时序问题OFFSET约束-How to find and solve the FPGA design OFFSET timing constraint problem
- 2022-03-21 14:20:32下载
- 积分:1
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G1037单轴摆式伺服线加速度计试验方法,一片很不错的论文
G1037单轴摆式伺服线加速度计试验方法,一片很不错的论文-G1037 uniaxial accelerometer tilting servo line test method, a very good paper
- 2023-02-01 21:20:03下载
- 积分:1
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Unix book learning English books Type : System Precinct license : free software...
Unix学习宝典
简体中文
书籍类型: 系统专区
授权方式: 免费软件
书籍大小: 398 KB
-Unix book learning English books Type : System Precinct license : free software books Size : 398 KB
- 2022-11-23 05:05:02下载
- 积分:1
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基于8051单片机的数控电源设计方案
基于8051单片机的数控电源设计方案-8051 NC-based power supply design program! ! ! ! ! ! ! ! ! ! ! ! ! ! !
- 2022-04-07 18:55:26下载
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Storage structure in order to use the element number that the location and eleme...
在顺序存储结构中,利用编号表示元素的位置及元素之间孩子或双亲的关系,因此对于非完全二叉树,需要将空缺的位置用特定的符号填补,若空缺结点较多,势必造成空间利用率的下降。在这种情况下,就应该考虑使用链式存储结构。-Storage structure in order to use the element number that the location and elements of the relationship between children or parents, so for non-complete binary tree, the location of the vacancy will be required to use specific symbols to fill the vacancy if more nodes, it is bound to cause decline in utilization of space. In this case, we should consider the use of the structure of chain stores.
- 2023-03-12 11:35:04下载
- 积分:1
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介绍powerdesigner工具的使用
介绍powerdesigner工具的使用-Powerdesigner introduce the use of instrument
- 2022-06-27 11:25:08下载
- 积分:1
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松翰RP系统的技术指标,工作流描述和详细规格…
SONIX RP系统、技术指标、工作流程描述和详细规范
- 2022-12-06 15:40:03下载
- 积分:1
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C51RF
C51RF-PS无线开发系统的说明书和快速开发指南(关于CC1110和CC2510)-C51RF-PS wireless development system for rapid development of guidelines and instructions (on the CC1110 and CC2510)
- 2022-03-01 23:10:10下载
- 积分:1
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The design of digital frequency meter can be divided into measurement and displa...
数字频率计的设计可以分为测量计数和显示。其测量的基本原理是计算一定时间内待测信号的脉冲个数,这就要求由分频器产生标准闸门时间信号,计数器记录脉冲个数,由控制器对闸门信号进行选择,并对计数器使能断进行同步控制。控制器根据闸门信号确定最佳量程。-The design of digital frequency meter can be divided into measurement and display count. The basic principle of its measurement is calculated under test signal within a certain period of time the number of pulses, which have a standard requirement by the divider gate time signal pulse counter records the number of signals from the controller to choose the gates and counters to make off synchronous control can be carried out.Controller based on the gate signal to determine the optimum range.
- 2022-07-05 10:34:03下载
- 积分:1
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活性成分为Altium原理图库
Active component schematic library for altium
- 2022-05-27 20:25:51下载
- 积分:1