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air
空调温控电路有限状态自动机，
有ＴＥＭＰ＿ＨＩＧＨ和ＴＥＭＰ＿ＬＯＷ
分别与传感器相连用语检测室内温度．-air-conditioning temperature control circuit finite state automaton, and TEMP_LOW TEMP_HIGH with sensors connected to the indoor temperature detection terminology.
- 2022-04-25 13:00:13下载
- 积分：1
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vga example for altera
altera的vga示例
- 2022-08-03 13:31:56下载
- 积分：1
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ag-overview
说明： agilex fpga description
- 2019-05-13 18:21:04下载
- 积分：1
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I2C_master_code
主要介绍，I2C总线主设备发送数据给从设备，代码实现是用Verilog语言实现的，对硬件设计者有很大好处(Introduces, I2C bus master to send data to the slave device, code is implemented in Verilog language, the hardware designer of great benefit)
- 2011-07-12 14:31:11下载
- 积分：1
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FPGAshixu
FPGA经验总结：时序是设计出来的
我们在做详细设计的时候，对于一些信号的时序肯定会做一些调整的，但是这种时序的调整最多只能波及到本一级模块，而不能影响到整个设计。(FPGA Experience: Timing is designed to do the detailed design of our time, for some signal timing will certainly make some adjustments, but adjust this timing can only spread to up to this level of the module, but not affect the whole design.)
- 2015-03-13 10:27:51下载
- 积分：1
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位同步例程源代码,FPGA应用领域，Verilog
位同步例程源代码,FPGA应用领域，Verilog-Bit synchronization routines source code, FPGA applications, Verilog
- 2022-03-25 15:19:48下载
- 积分：1
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中科院VHDL学习资料，很好的东西，希望对大家有用
中科院VHDL学习资料，很好的东西，希望对大家有用-Chinese Academy of Sciences VHDL learning materials, a very good thing, everyone would like to be useful
- 2022-09-02 02:55:03下载
- 积分：1
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改变盒FPGA DE2
Alter kit FPGA de2-35
This project shows a cascade motion through board leds.-Alter kit FPGA de2-35
This project shows a cascade motion through board leds.
- 2022-03-06 03:51:32下载
- 积分：1
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VHDL编写的数字钟，在Q
VHDL编写的数字钟，在Q-ii下编译，实现闹铃设置与定时闹铃，分时秒显示-VHDL prepared digital clock, in the Q-ii under the compiler to achieve regular alarm and alarm settings, time-seconds display
- 2022-12-10 02:20:03下载
- 积分：1
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SignalTapII学习笔记
说明： 学习fpga的工具signaltap软件使用说明书，好工具(Learn the instruction manual of signaltap software, a good tool)
- 2020-03-29 17:59:18下载
- 积分：1
