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RTSP protocol
RTSP的标准协议,包括中文、英文,实时流协议(RTSP)是应用层协议,控制实时数据的传送。RTSP提供了一个可扩展框架,使实时数据,如音频与视频的受控、点播成为可能。数据源包括现场数据与存储在剪辑中数据。该协议目的在于控制多个数据发送连接,为选择发送通道,如UDP、组播UDP与TCP,提供途径,并为选择基于RTP(RFC1889)上传送机制提供方法。-RTSP protocol
- 2022-05-09 04:54:52下载
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用户ID:susanmcelroy
Subscriber Id: SusanMcElroy
Subscription Code: FLR8ZC-855556-545465-6383928252
Subscriber Id: SusanMcElroy-UL2-EX2009-09-10
Subscription Code: FLR8ZC-855557-545465-6433044498-Subscriber Id: SusanMcElroy
Subscription Code: FLR8ZC-855556-545465-6383928252
Subscriber Id: SusanMcElroy-UL2-EX2009-09-10
Subscription Code: FLR8ZC-855557-545465-6433044498
- 2022-06-21 04:26:15下载
- 积分:1
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实用的VB源代码,适合初学者,初学者改善预后…
vb实用的源代码,适合初学者,对于提高初学者的编程有很大的帮助!-practical vb source code, suitable for beginners, for beginners improve the programming of great help!
- 2023-05-17 15:00:03下载
- 积分:1
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java developers Yearbook. Provide a lot of detailed codes for reference
java开发者年鉴.提供了很多详细的代码供参考-java developers Yearbook. Provide a lot of detailed codes for reference
- 2022-03-01 13:42:10下载
- 积分:1
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JavaScript的书籍介绍,纯正的英语,高手请进。
一本介绍javascript的好书,纯英文,高手请进。-javascript a briefing books, pure English, experts invited to play.
- 2022-07-26 02:35:28下载
- 积分:1
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数字通信原理,又一本通信基础课的参考书,美国中部Big Ten大学EE的普适研究生教材...
数字通信原理,又一本通信基础课的参考书,美国中部Big Ten大学EE的普适研究生教材-Digital communication theory, communication infrastructure is another lesson in this reference book, Mid-America Big Ten university graduate students teaching the universality EE
- 2022-03-06 12:49:27下载
- 积分:1
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ding ding dingdin g dingg ding
ding ding dingdin g dingg ding-ding ding ding ding dingdinding dingg ding
- 2023-06-12 06:10:03下载
- 积分:1
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sql server 2000 FOSS
sql server 2000 源码-sql server 2000 FOSS
- 2022-01-26 04:36:56下载
- 积分:1
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on JDBC Database Programming, the book introduces Java programming foundation, b...
关于JDBCAPI数据库编程的书,主要介绍Java程序设计基础、SQL基础知识、JDBC应用、接口和类,以及如何在JSP和Servlet中使用JDBC。-on JDBC Database Programming, the book introduces Java programming foundation, basic knowledge of SQL, JDBC application interface and category, and how the JSP and Servlet using JDBC.
- 2022-07-08 06:06:52下载
- 积分:1
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FPGA pipelined designs on paper This work investigates the use of very deep pipe...
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work invest
- 2022-11-28 12:05:03下载
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