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100vhdlsimple
说明： 100个vhdl例子，对初学者很有用，可以用MAX+PLUS 2来编译仿真的(100 vhdl example, useful for beginners, you can use the MAX+ PLUS 2 to compile the simulation)
- 2010-05-02 10:01:58下载
- 积分：1
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add1A
用于实现锁相光子计数技术的累加器，verilog语言(Accumulator achieve specific cases for accumulator lock detection of photon counting technique)
- 2016-04-09 11:13:25下载
- 积分：1
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AHB 接口
这是 AHB 仿真套件。它包含以下文件：ahb_def.v-定义文件ahbmst.v-AHB 主模型ahbslv.v-AHB 奴隶模型ahbarb.v-AHB 仲裁模型ahbdec.v-AHB 解码器模型testbench.v-顶级水平测试台架文件ahb_stimuli.v-样品 AHB 刺激文件qm_ahbmst_ (test_) 任务 （1，2） 的媚眼-AHB 主设备和从设备测试矢量文件ahbmodel.spj-筒仓三模拟项目文件
- 2022-07-05 12:16:19下载
- 积分：1
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DisplayPort Link training optimization
说明： 介绍了Displayport规格中lind training的背景研究，设计和实现。(As the requirement for bandwidth continues to increase in the video market, retaining
the signal integrity becomes increasingly more difficult. For many of todays
commonly used video interfaces, there are devices that can be used to assist in this
matter. However, the use of such a device is only partially documented in the DisplayPort
specification for the receiving image device, which means that the receiving
side of the video link is free to choose its own implementation. This report presents,
together with background research and design decisions, a suggestion for such an
implementation. This implementation would need to be compatible towards a wide
range of possible video Source devices and DisplayPort cables.)
- 2021-01-11 16:48:49下载
- 积分：1
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xilinx_usb_drivers_win10_x64
说明： win10的xilinx usb驱动，较新版本(Xilinx USB driver for win10, newer version)
- 2021-03-11 17:09:26下载
- 积分：1
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modelsim_gaosi
说明： 用matlab将图片转成灰度图TXT，再通过verilog将数据导入FPGA中，采用高斯滤波算法来处理，再将处理后的图片数据导出到TXT中。(The image is transformed into gray-scale image TXT by MATLAB, and then the data is imported into FPGA by Verilog, processed by Gauss filter algorithm, and then the processed image data is exported to TXT.)
- 2020-05-28 16:20:09下载
- 积分：1
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FPGA
说明： 基于FPGA的数字式相位测量仪的设计与制作(FPGA-Based Digital Phase Meter Design and Production)
- 2010-04-16 19:40:41下载
- 积分：1
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一款商用ADC的verilog
商用可综合adc,分辨率为16位，内含一个时序检查功能，可供对ADC感兴趣的人有帮助。尤其是需要一个ADC模型的可以使用
- 2022-01-25 22:47:37下载
- 积分：1
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PN-(2)
伪随机序列FPGA 通过仿真 M3000(Pseudo-random sequence M3000 FPGA simulation)
- 2011-06-09 13:40:00下载
- 积分：1
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本代码实现apb总线传输
本代码可实现apb总线的配置、传输等功能。代码已经经过仿真、验证，代码注释全面，简单易懂。本代码可实现apb总线的配置、传输等功能。代码已经经过仿真、验证，代码注释全面，简单易懂。本代码可实现apb总线的配置、传输等功能。代码已经经过仿真、验证，代码注释全面，简单易懂。
- 2022-05-05 19:48:12下载
- 积分：1
