-
tcdg
Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorithms existing, and I feel there is a need to understand how they work. So this text explains a number of popular encryption algorithms and makes you look at them as mathematical formulas.
- 2014-01-29 15:57:35下载
- 积分:1
-
16bit-multiplier
实现verilog16位乘法器,verilog新手(achieve 16-bit multiplier)
- 2021-04-01 21:09:08下载
- 积分:1
-
异步FIFO
自己编写的同步和异步FIFO的verilog代码,验证过,有可靠性(Verilog code of my own synchronous and asynchronous FIFO, verified,and reliable.)
- 2020-07-03 07:00:02下载
- 积分:1
-
EX11_RS232
F2812串口通信,用于串口通信时使用,可以在线调整(F2812 serial communication, is used for serial communication can be adjusted online)
- 2013-05-23 14:58:33下载
- 积分:1
-
pluse
说明: 发送两个频段的脉冲 个数和频率均可调
发送两个频段的脉冲 个数和频率均可调(pluse and adjust the width of pluse pluse and adjust the width of pluse )
- 2010-04-14 11:00:03下载
- 积分:1
-
fir.tar
FIR滤波器的VHDL语言实现(The implement of FIR Filter based on VHDL)
- 2004-10-19 10:14:56下载
- 积分:1
-
jiaotongdeng
交通灯通过数码管显示,几种模式可调,还可以时间可设,适合初学者入门参考学习。(LED traffic lights can be set to several modes adjustable time beginners reference ~ ~ ~)
- 2013-08-25 10:02:34下载
- 积分:1
-
MATLAB产生单脉冲信号的数据 exp_rom
说明: 通过MATLAB产生单脉冲信号的数据,存储下来作为verilog代码实现的DDS的数据源,用于验证DA数据的ddio的调试是否有问题。(The data of monopulse signal generated by MATLAB is stored as the data source of DDS implemented by Verilog code to verify whether the ddio debugging of DA data is problematic.)
- 2020-06-23 04:40:02下载
- 积分:1
-
FPGA 的数字传输比
计算多少次,把小砂轮安装数字传输比率是车轮的在一个更大完全旋转旋
- 2022-03-19 23:13:15下载
- 积分:1
-
一个用VHDL语言编写的双端口存储器程序,可下载在FPGA中使用
一个用VHDL语言编写的双端口存储器程序,可下载在FPGA中使用-Written in VHDL language using a dual-port memory program can be downloaded in the FPGA using
- 2023-06-18 05:20:03下载
- 积分:1