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code
adder 18b trong chuong trinh verilog
- 2017-11-26 14:34:56下载
- 积分：1
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AD9226
FPGA控制AG9226进行采样的代码,并用signaltap测试了一下其正确性(FPGA control AG9226 to sample the code, and use signaltap to test the correctness of the demo.)
- 2020-12-19 17:19:09下载
- 积分：1
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等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
- 2022-06-28 09:27:01下载
- 积分：1
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nnpid
通过神经网络实现的PID算法，整个工程文件，调试通过。(By PID algorithm neural networks, the entire project files, debugging through.)
- 2020-11-20 21:39:37下载
- 积分：1
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AD9826-verilog
使用Verilog编写的ad9826的控制模块(the module of ad9826 with verilog)
- 2016-05-09 14:45:37下载
- 积分：1
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ISARCSSim_dr
基于CS的一维距离像（HRRP）及FFT成像对比(CS-based HRRP and FFT HRRP)
- 2021-01-13 19:58:49下载
- 积分：1
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Quartus_II_13.1_x64破解器
说明： quartus的破解软件，里面有说明文档(Quartus crack software, which contains documentation.)
- 2021-03-16 09:19:22下载
- 积分：1
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grlib-gpl-1.1.0-b4108
gaisler公司在2011年发布的的leon3的源代码！(source code of leon3 )
- 2012-05-12 00:12:20下载
- 积分：1
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本项目是基于SR和D触发器的使用vhdl.this是100正确的内容。
this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
-this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
- 2022-06-27 01:31:46下载
- 积分：1
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Verilog LDPC码
说明： LDPC码的BP译码verliong程序(BP decoding veriong program of LDPC code)
- 2020-03-03 18:14:12下载
- 积分：1
