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turbo_encode
turbo码的编码程序,verilog HDL,在ISE环境中(turbo code encoding process)
- 2014-03-29 15:09:58下载
- 积分:1
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DigitalClock
数字钟:实验中用到的小程序,用于万年历中的模块(Digital clock: a small program used in the experiment, the modules for calendar)
- 2013-05-26 09:25:23下载
- 积分:1
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svpwm3
说明: 基於空間向量調變的開關法,在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)
- 2019-01-04 16:07:37下载
- 积分:1
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FPGA1(introduce)
FPGA三国论战,入门介绍和高端见解!对于FPGA初学者很有用。(Three FPGA controversy, and high-end introduction to ideas! For FPGA useful for beginners.)
- 2014-03-22 16:19:51下载
- 积分:1
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Manchester-code-of-VHDL-program
利用FPGA实现硬件的VHLD语言的Manchester code。(Hardware implementation using FPGA VHLD language Manchester code.)
- 2013-07-14 22:08:25下载
- 积分:1
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jt2
基于FPGA的交通灯代码,VHDL语言书写。适合新手学习vhdl语言时使用(FPGA-based traffic light code, VHDL language writing. Suitable for novice learning vhdl language used when)
- 2013-10-26 13:30:26下载
- 积分:1
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imports
displayport 参考设计,可以对比自己工程做验证,另有参考设计XAPP1178未找到,采用方案为DP159 + Artix7 FPGA(xilinx displayport sink design)
- 2021-01-11 16:58:50下载
- 积分:1
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BCH_EncDec_Matlab
bch编解码的完整版,本人已经做过fpga实现,就是按照该程序为原型,绝对可运行(bch decoding the full version, I have done fpga implementation is in accordance with the procedure for the prototype, can certainly run)
- 2011-10-27 21:55:11下载
- 积分:1
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hidejj
实现线性反馈移位寄存器的verilog实现(lfsr use verilog for the zip)
- 2017-08-02 14:23:12下载
- 积分:1
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FPGA_SOURCE_CODE
ad9910 FPGA VERILOG 初始化代码,(Ad9910 FPGA VERILOG initialization code)
- 2017-08-01 10:01:28下载
- 积分:1