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polar_SC译码
该部分的主要功能是完成基于FPGA的polar码SC译码。(The main function of this part is to complete the FPGA-based polar code SC decoding.)
- 2021-02-17 13:49:46下载
- 积分：1
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CPU-Project
说明： CPU设计，包含基本的指令集，能执行简单的程序。考虑了CPU，寄存器，存储器和指令集之间的关系。即读写寄存器，读写存储器和执行指令。(CPU design, including basic instruction set, to execute a simple program. Consider the CPU, registers, memory, and the relationship between instruction sets. That read and write registers, read and write memory and execution.)
- 2011-02-28 17:33:33下载
- 积分：1
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HDB3
HDB3码在matlab中的仿真，包括原始码、AMI码及HDB码的相关仿真图形(HDB simulink in matlab)
- 2020-07-04 19:40:02下载
- 积分：1
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seven-voting
用verilog 语言实现七人投票表决器(verilog seven voting)
- 2020-09-24 10:57:48下载
- 积分：1
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wirebus总线nand flash controller
wirebus总线nand flash controller，基础入门控制器，内存管理，fpga实现。已编译通过。编译平台quartus ii
- 2023-02-28 07:40:03下载
- 积分：1
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costas
costas的verilog程序，包含乘法器，DDS，鉴相器，环路滤波器等模块(costas the verilog program, including multipliers, DDS, phase detector, loop filter modules)
- 2011-08-19 10:20:53下载
- 积分：1
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USART
基于USART的ARM与FPGA通信实验(Based on the ARM and FPGA communication experiment of USART
)
- 2017-04-15 16:58:30下载
- 积分：1
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xadc_temperature
说明： 用于FPGA中zynq的温度上报，通过逻辑方式。(It is used to report the temperature of zynq in FPGA by logic)
- 2019-12-18 11:47:43下载
- 积分：1
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am
基于FPGA的用verilog语言写的，改程序可产生不同调制系数和不同频率的AM波，长按按键切换调制度25 、50 、75 和短按按键切换调制信号频率1k、1.5k、2k、2.5k.(Based on the FPGA using verilog language, change the program can produce different coefficients and different frequency modulated AM wave, long press the button to switch the modulation of 25 , 50 , 75 and short press button to switch the modulation signal frequency 1k, 1.5k, 2k, 2.5k.)
- 2013-10-14 22:14:56下载
- 积分：1
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Masseffect-3---Jane-Shepard
超級好用
25M~100HZ的除頻器
寫了好久 超級實用
歡迎下載(Super easy to 25M ~ 100HZ of divider wrote a long time super practical welcome to download)
- 2013-09-13 13:33:13下载
- 积分：1
