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pinlvji
使用FPGA测量频率大小,并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)
- 2020-06-18 10:20:02下载
- 积分:1
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扰码器Verilog
实现扰码的功能,主要为64位在pcs子层传输的扰码器设计(To achieve the functions of scrambling code)
- 2020-10-17 17:27:27下载
- 积分:1
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Self-study-syllabus-VSC-HVDC
Syllabus for VSC-HVDC course
- 2012-08-24 12:49:16下载
- 积分:1
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sd_models_verilog
测试过可用的SD仿真模型,VERILOG语言(SD card simulation modle, test OK)
- 2021-02-26 20:09:37下载
- 积分:1
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VGAPPS2PCORDIC
FPGA课程设计源码,整合VGA,PS2键盘,CORDIC三角函数算法,在basys2平台上使用完全可行。(FPGA curriculum design source, integrated VGA, PS2 keyboard, CORDIC trigonometric algorithm, used on basys2 platform entirely feasible.)
- 2015-10-12 20:56:05下载
- 积分:1
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exercise3
用verilog实现dsp与Fpga接口的同步设计,其功能包括读写操作及四个功能模块,采用两个fifo实现不同时钟域的地址与数据的转换,在quartus ii11.0环境下运行,运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)
- 2013-08-30 11:12:09下载
- 积分:1
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xilinx zc706开发板Verilog流水灯源代码
xilinx zc706开发板Verilog流水灯源代码,适合刚开始接触FPGA的程序员,新接触xilinx ZYNQ-7000 zc706套件开发板的菜鸟,资源包含设计程序,仿真程序、综合程序,很简单的代码,适合初学者
- 2022-02-10 00:22:30下载
- 积分:1
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Verilog_code_for_AWGN
说明: verilog实现awgn信道噪声的代码,支持可变的信噪比。利用移位寄存器来实现伪随机序列。(verilog code for implementation of awgn channel noise. support variable snr. use LSFR to implement the pseudo random sequence. )
- 2021-01-14 16:48:47下载
- 积分:1
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all clock
数字钟通过verilog实现,并且支持Modelsim仿真(The digital clock is implemented by Verilog and supports Modelsim simulation)
- 2020-06-18 05:00:01下载
- 积分:1
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VHDLexample
VHDL开发程序,有程序仿真的截图,方便验证调试结果。并有程序说明(VHDL 驴 陋 垄 鲁 脤臑貌 拢 卢 脫臑 鲁 脤臑貌 脗脮忙渭脛 陆 脴脥 录拢卢路陆卤 茫脩茅脰 陇 渭 梅 脢脭 陆 谩 鹿 没 隆 拢 虏 垄 脫臑 鲁 脤臑貌脣渭脙 梅)
- 2008-04-10 16:11:04下载
- 积分:1